From: Nandhini Srikandan <nandhini.srikandan@xxxxxxxxx> Add support to select the controller mode as master mode by setting Bit 31 of CTRLR0 register. This feature is supported for controller versions above v1.02. Signed-off-by: Nandhini Srikandan <nandhini.srikandan@xxxxxxxxx> --- drivers/spi/spi-dw-core.c | 4 ++-- drivers/spi/spi-dw.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index bfa075a4f779..26d0ef87661d 100644 --- a/drivers/spi/spi-dw-core.c +++ b/drivers/spi/spi-dw-core.c @@ -308,8 +308,8 @@ static u32 dw_spi_prepare_cr0(struct dw_spi *dws, struct spi_device *spi) /* CTRLR0[14] Slave Select Toggle Enable */ cr0 |= chip->sste << DWC_SSI_CTRLR0_SSTE_OFFSET; - if (dws->caps & DW_SPI_CAP_KEEMBAY_MST) - cr0 |= DWC_SSI_CTRLR0_KEEMBAY_MST; + /* CTRLR0[31] MST */ + cr0 |= DWC_SSI_CTRLR0_MST; } return cr0; diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h index 2ee3f839de39..d67f62ff79c9 100644 --- a/drivers/spi/spi-dw.h +++ b/drivers/spi/spi-dw.h @@ -78,11 +78,11 @@ #define DWC_SSI_CTRLR0_DFS_OFFSET 0 /* - * For Keem Bay, CTRLR0[31] is used to select controller mode. + * CTRLR0[31] is used to select controller mode. * 0: SSI is slave * 1: SSI is master */ -#define DWC_SSI_CTRLR0_KEEMBAY_MST BIT(31) +#define DWC_SSI_CTRLR0_MST BIT(31) /* Bit fields in CTRLR1 */ #define SPI_NDF_MASK GENMASK(15, 0) -- 2.17.1
