From: Rashmi A <rashmi.a@xxxxxxxxx>
Add documentation for Arasan SDHCI controller in Thunder Bay SOC.
Signed-off-by: Rashmi A <rashmi.a@xxxxxxxxx>
---
.../devicetree/bindings/mmc/arasan,sdhci.yaml | 25 +++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml b/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml
index 37a5fe7b26dc..23abb7e8b9d8 100644
--- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml
+++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml
@@ -88,6 +88,12 @@ properties:
description:
For this device it is strongly suggested to include
arasan,soc-ctl-syscon.
+ - items:
+ - const: intel,thunderbay-sdhci-5.1 # Intel Thunder Bay eMMC PHY
+ - const: arasan,sdhci-5.1
+ description:
+ For this device it is strongly suggested to include
+ clock-output-names and '#clock-cells'.
reg:
maxItems: 1
@@ -301,3 +307,22 @@ examples:
<&scmi_clk KEEM_BAY_PSS_SD0>;
arasan,soc-ctl-syscon = <&sd0_phy_syscon>;
};
+
+ - |
+ #define EMMC_XIN_CLK
+ #define EMMC_AXI_CLK
+ #define TBH_PSS_EMMC_RST_N
+ mmc@80420000 {
+ compatible = "intel,thunderbay-sdhci-5.1", "arasan,sdhci-5.1";
+ interrupts = <GIC_SPI 714 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0x80420000 0x400>;
+ clocks = <&scmi_clk EMMC_XIN_CLK>,
+ <&scmi_clk EMMC_AXI_CLK>;
+ clock-names = "clk_xin", "clk_ahb";
+ phys = <&emmc_phy>;
+ phy-names = "phy_arasan";
+ assigned-clocks = <&scmi_clk EMMC_XIN_CLK>;
+ clock-output-names = "emmc_cardclock";
+ resets = <&rst_pss1 TBH_PSS_EMMC_RST_N>;
+ #clock-cells = <0x0>;
+ };
--
2.17.1
