Specify the phy-mode for the external PHYs on the third switch on the
ZII development rev B board so phylink and phylib knows what mode these
interfaces are configured for.
Signed-off-by: Russell King (Oracle) <rmk+kernel@xxxxxxxxxxxxxxx>
---
arch/arm/boot/dts/vf610-zii-dev-rev-b.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts b/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts
index 9034d99cee97..65e54dcd46b2 100644
--- a/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts
+++ b/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts
@@ -211,12 +211,14 @@ port@0 {
reg = <0>;
label = "lan6";
phy-handle = <&switch2phy0>;
+ phy-mode = "sgmii";
};
port@1 {
reg = <1>;
label = "lan7";
phy-handle = <&switch2phy1>;
+ phy-mode = "sgmii";
};
port@2 {
--
2.30.2
