Add APU power domain node to MT8192. Signed-off-by: Flora Fu <flora.fu@xxxxxxxxxxxx> --- Note: This patch depends on mt8192/mt6359 dts patches which haven't yet been accepted. This series is based on MT8192 clock[1][2] and MT8193/PMIC[3][4] patches. [1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=521655 [2] https://patchwork.kernel.org/patch/12134935 [3] https://patchwork.kernel.org/patch/12140237 --- arch/arm64/boot/dts/mediatek/mt8192-evb.dts | 7 ++++++ arch/arm64/boot/dts/mediatek/mt8192.dtsi | 27 +++++++++++++++++++++ 2 files changed, 34 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-evb.dts b/arch/arm64/boot/dts/mediatek/mt8192-evb.dts index 808be492e970..5d9e108e41f5 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-evb.dts +++ b/arch/arm64/boot/dts/mediatek/mt8192-evb.dts @@ -28,3 +28,10 @@ &uart0 { status = "okay"; }; + +&apuspm { + vsram-supply = <&mt6359_vsram_md_ldo_reg>; + apu_top: power-domain@0 { + domain-supply = <&mt6359_vproc1_buck_reg>; + }; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index 72bbc3b4abf9..7014082637b0 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -928,6 +928,33 @@ #clock-cells = <1>; }; + apuspm: power-domain@190f0000 { + compatible = "mediatek,mt8192-apu-pm", "syscon"; + reg = <0 0x190f0000 0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + #power-domain-cells = <1>; + mediatek,scpsys = <&scpsys>; + mediatek,apu-conn = <&apu_conn>; + mediatek,apu-vcore = <&apu_vcore>; + apu_top: power-domain@0 { + reg = <0>; + #power-domain-cells = <0>; + clocks = <&topckgen CLK_TOP_DSP_SEL>, + <&topckgen CLK_TOP_IPU_IF_SEL>, + <&clk26m>, + <&topckgen CLK_TOP_UNIVPLL_D6_D2>; + clock-names = "clk_top_conn", + "clk_top_ipu_if", + "clk_off", + "clk_on_default"; + assigned-clocks = <&topckgen CLK_TOP_DSP_SEL>, + <&topckgen CLK_TOP_IPU_IF_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D6_D2>, + <&topckgen CLK_TOP_UNIVPLL_D6_D2>; + }; + }; + camsys: clock-controller@1a000000 { compatible = "mediatek,mt8192-camsys"; reg = <0 0x1a000000 0 0x1000>; -- 2.18.0
