Hi Gabriel I guess you are the maintainer of stm32 clk subsystem from [1], Could you help to review this patch, just give a brief of the history: - this patch was acked by Stephen Boyd at [2]. - reviewed by Patrice Chotard at [3]. Without this patch , the kernel will turn off ltdc's clk after the system reach shell. [1] https://lore.kernel.org/lkml/AM8PR10MB4785545DC980090C1E7D66B281009@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/ [2] https://lore.kernel.org/linux-arm-kernel/159056850835.88029.9264848839121822798@xxxxxxxxxxxxxxxxxxxxxxxxxx/ [3] https://lore.kernel.org/lkml/6915fa2a-e211-476f-8317-6825e280c322@xxxxxxxxxxx/#t Best Regards Dillon On Tue, 19 Oct 2021 at 16:44, Dillon Min <dillon.minfei@xxxxxxxxx> wrote: > > stm32's clk driver register two ltdc gate clk to clk core by > clk_hw_register_gate() and clk_hw_register_composite() > > first: 'stm32f429_gates[]', clk name is 'ltdc', which no user to use. > second: 'stm32f429_aux_clk[]', clk name is 'lcd-tft', used by ltdc driver > > both of them point to the same offset of stm32's RCC register. after > kernel enter console, clk core turn off ltdc's clk as 'stm32f429_gates[]' > is no one to use. but, actually 'stm32f429_aux_clk[]' is in use. > > stm32f469/746/769 have the same issue, fix it. > > Fixes: daf2d117cbca ("clk: stm32f4: Add lcd-tft clock") > Acked-by: Stephen Boyd <sboyd@xxxxxxxxxx> > Link: https://lore.kernel.org/linux-arm-kernel/1590564453-24499-7-git-send-email-dillon.minfei@xxxxxxxxx/ > Link: https://lore.kernel.org/lkml/CAPTRvHkf0cK_4ZidM17rPo99gWDmxgqFt4CDUjqFFwkOeQeFDg@xxxxxxxxxxxxxx/ > Signed-off-by: Dillon Min <dillon.minfei@xxxxxxxxx> > --- > v6: no change. > > drivers/clk/clk-stm32f4.c | 4 ---- > 1 file changed, 4 deletions(-) > > diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c > index af46176ad053..473dfe632cc5 100644 > --- a/drivers/clk/clk-stm32f4.c > +++ b/drivers/clk/clk-stm32f4.c > @@ -129,7 +129,6 @@ static const struct stm32f4_gate_data stm32f429_gates[] __initconst = { > { STM32F4_RCC_APB2ENR, 20, "spi5", "apb2_div" }, > { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, > { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, > - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, > }; > > static const struct stm32f4_gate_data stm32f469_gates[] __initconst = { > @@ -211,7 +210,6 @@ static const struct stm32f4_gate_data stm32f469_gates[] __initconst = { > { STM32F4_RCC_APB2ENR, 20, "spi5", "apb2_div" }, > { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, > { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, > - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, > }; > > static const struct stm32f4_gate_data stm32f746_gates[] __initconst = { > @@ -286,7 +284,6 @@ static const struct stm32f4_gate_data stm32f746_gates[] __initconst = { > { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, > { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, > { STM32F4_RCC_APB2ENR, 23, "sai2", "apb2_div" }, > - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, > }; > > static const struct stm32f4_gate_data stm32f769_gates[] __initconst = { > @@ -364,7 +361,6 @@ static const struct stm32f4_gate_data stm32f769_gates[] __initconst = { > { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, > { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, > { STM32F4_RCC_APB2ENR, 23, "sai2", "apb2_div" }, > - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, > { STM32F4_RCC_APB2ENR, 30, "mdio", "apb2_div" }, > }; > > -- > 2.7.4 >
