On Tue, Oct 19, 2021 at 4:05 AM Andrew Lunn <andrew@xxxxxxx> wrote: > > > > > > + GPIO controller module provides GPIO-s for the SFP slots. > > > > > + It is split into 3 controllers, one output only for the SFP TX disable > > > > > + pins, one input only for the SFP present pins and one input only for > > > > > + the SFP LOS pins. > > Late to the conversation, so i might be asking questions already > asked... > > So the PLD has restrictions? You have a collection of GPOs and a > collection of GPIs? You don't have an GPIOs? Yes, the CPLD is hardwired per board with the specific FW for it. There are no true GPIO-s, only input or output pins depending on their purpose in the SFP cage. > > > > > > + > > > > > +properties: > > > > > + compatible: > > > > > + enum: > > > > > + - delta,tn48m-gpio-sfp-tx-disable > > > > > + - delta,tn48m-gpio-sfp-present > > > > > + - delta,tn48m-gpio-sfp-los > > Do these names have any real significant? Are you really forced to > connect the SFP cage in this dedicated manor? Is there any reason why > i cannot use a GPO to control an LED? A GPI for a button? Yes, there are connected like this on the TN48M switch, names directly match their purpose. The CPLD is customized per each switch model, so TN4810M which is the 48 x 10G SFP+ uses the same CPLD model but is wired differently and with a different FW. Since it's a CPLD you technically use whatever pin to connect stuff, but it completely depends on the FW implementation as there is no traditional GPIO block with XYZ number of pins. I have multiple vendors and models using the same CPLD but its wired completely different and the register layout is different. So you cant force any of the input pins to output mode or change their value at all, its all hardwired. Regards, Robert > > Andrew -- Robert Marko Staff Embedded Linux Engineer Sartura Ltd. Lendavska ulica 16a 10000 Zagreb, Croatia Email: robert.marko@xxxxxxxxxx Web: www.sartura.hr
