The 10/18/2021 14:28, Rob Herring wrote:
>
> On Fri, Oct 15, 2021 at 02:39:19PM +0200, Horatiu Vultur wrote:
> > Lan966x has: 2 integrated PHYs, 3 SerDes and 2 RGMII interfaces. Which
> > requires to be muxed based on the HW representation.
> >
> > So add constants for each interface to be able to distinguish them.
> >
> > Signed-off-by: Horatiu Vultur <horatiu.vultur@xxxxxxxxxxxxx>
> > ---
> > include/dt-bindings/phy/phy-lan966x-serdes.h | 14 ++++++++++++++
> > 1 file changed, 14 insertions(+)
> > create mode 100644 include/dt-bindings/phy/phy-lan966x-serdes.h
> >
> > diff --git a/include/dt-bindings/phy/phy-lan966x-serdes.h b/include/dt-bindings/phy/phy-lan966x-serdes.h
> > new file mode 100644
> > index 000000000000..8a05f93ecf41
> > --- /dev/null
> > +++ b/include/dt-bindings/phy/phy-lan966x-serdes.h
> > @@ -0,0 +1,14 @@
> > +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
> > +
> > +#ifndef __PHY_LAN966X_SERDES_H__
> > +#define __PHY_LAN966X_SERDES_H__
> > +
> > +#define PHY(x) (x)
> > +#define PHY_MAX PHY(2)
> > +#define SERDES6G(x) (PHY_MAX + 1 + (x))
> > +#define SERDES6G_MAX SERDES6G(3)
> > +#define RGMII(x) (SERDES6G_MAX + 1 + (x))
> > +#define RGMII_MAX RGMII(2)
> > +#define SERDES_MAX (RGMII_MAX + 1)
>
> I still don't understand. #phy-cells description says we have:
>
> <port idx> <serdes idx>
>
> But here it's 3 numbers. How are these defines used to fill in the 2
> cells?
Actually they are still only a number. Or maybe I am missing something.
Maybe an example will help:
---
serdes: serdes@e2004010 {
compatible = "microchip,lan966x-serdes";
reg = <0xe202c000 0x9c>, <0xe2004010 0x4>;
#phy-cells = <2>;
};
&port0 {
...
phys = <&serdes 0 SERDES6G(1)>;
...
};
&port1 {
...
phys = <&serdes 1 PHY(0)>;
...
}
...
---
Here are some existing examples based on which I have created this patch
series:
https://elixir.bootlin.com/linux/v5.15-rc6/source/arch/mips/boot/dts/mscc/ocelot_pcb120.dts#L99
https://elixir.bootlin.com/linux/v5.15-rc6/source/arch/mips/boot/dts/mscc/ocelot.dtsi#L274
>
> Rob
--
/Horatiu
