On Thu, 07 Oct 2021 01:46:57 +0300, Dmitry Osipenko wrote: > Some Tegra20 boards don't have RAM code stored in NVMEM, which is used for > the memory chip identification and the identity information should be read > out from LPDDR2 chip in this case. Document new sub-node containing generic > LPDDR2 properties that will be used for the memory chip identification if > RAM code isn't available. The identification is done by reading out memory > configuration values from generic LPDDR2 mode registers of SDRAM chip and > comparing them with the values of device-tree 'lpddr2' sub-node. > > Signed-off-by: Dmitry Osipenko <digetx@xxxxxxxxx> > --- > .../nvidia,tegra20-emc.yaml | 23 +++++++++++++++++-- > 1 file changed, 21 insertions(+), 2 deletions(-) > Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
