Hi Vladimir, On Wed, 13 Oct 2021 at 18:35, Vladimir Zapolskiy <vladimir.zapolskiy@xxxxxxxxxx> wrote: > > Hi Bhupesh, > > On 10/13/21 1:55 PM, Bhupesh Sharma wrote: > > Convert Qualcomm QCE crypto devicetree binding to YAML. > > > > Cc: Thara Gopinath <thara.gopinath@xxxxxxxxxx> > > Cc: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx> > > Reviewed-by: Rob Herring <robh@xxxxxxxxxx> > > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@xxxxxxxxxx> > > --- > > .../devicetree/bindings/crypto/qcom-qce.yaml | 67 +++++++++++++++++++ > > 1 file changed, 67 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/crypto/qcom-qce.yaml > > > > diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml > > new file mode 100644 > > index 000000000000..b7ae873dc943 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml > > @@ -0,0 +1,67 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/crypto/qcom-qce.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Qualcomm crypto engine driver > > + > > +maintainers: > > + - Bhupesh Sharma <bhupesh.sharma@xxxxxxxxxx> > > + > > +description: | > > + This document defines the binding for the QCE crypto > > + controller found on Qualcomm parts. > > + > > +properties: > > + compatible: > > + const: qcom,crypto-v5.1 > > + > > + reg: > > + maxItems: 1 > > + > > + clocks: > > + items: > > + - description: iface clocks register interface. > > + - description: bus clocks data transfer interface. > > + - description: core clocks rest of the crypto block. > > + > > + clock-names: > > + items: > > + - const: iface > > + - const: bus > > + - const: core > > + > > + dmas: > > + items: > > + - description: DMA specifiers for tx dma channel. > > + - description: DMA specifiers for rx dma channel. > > Please consider to swap the description lines, so that they'll > be matching the dma-names below and a regular order found in > dts files. Ok, I will fix it in v5. Regards, Bhupesh > > + > > + dma-names: > > + items: > > + - const: rx > > + - const: tx > > + > > +required: > > + - compatible > > + - reg > > + - clocks > > + - clock-names > > + - dmas > > + - dma-names > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + #include <dt-bindings/clock/qcom,gcc-apq8084.h> > > + crypto-engine@fd45a000 { > > + compatible = "qcom,crypto-v5.1"; > > + reg = <0xfd45a000 0x6000>; > > + clocks = <&gcc GCC_CE2_AHB_CLK>, > > + <&gcc GCC_CE2_AXI_CLK>, > > + <&gcc GCC_CE2_CLK>; > > + clock-names = "iface", "bus", "core"; > > + dmas = <&cryptobam 2>, <&cryptobam 3>; > > + dma-names = "rx", "tx"; > > + }; > > > > -- > Best wishes, > Vladimir
