On 08.10.2021 17:43, Sam Protsenko wrote:
Provide dt-schema documentation for Exynos850 SoC clock controller. Signed-off-by: Sam Protsenko <semen.protsenko@xxxxxxxxxx> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxxxxx> Acked-by: Chanwoo Choi <cw00.choi@xxxxxxxxxxx>
diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml new file mode 100644 index 000000000000..79202e6e6402 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml @@ -0,0 +1,185 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/samsung,exynos850-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung Exynos850 SoC clock controller + +maintainers: + - Sam Protsenko <semen.protsenko@xxxxxxxxxx> + - Chanwoo Choi <cw00.choi@xxxxxxxxxxx> + - Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxxxxx> + - Sylwester Nawrocki <s.nawrocki@xxxxxxxxxxx> + - Tomasz Figa <tomasz.figa@xxxxxxxxx> + +description: | + Exynos850 clock controller is comprised of several CMU units, generating + clocks for different domains. Those CMU units are modeled as separate device + tree nodes, and might depend on each other. Root clocks in that clock tree are + two external clocks:: OSCCLK (26 MHz) and RTCCLK (32768 Hz). Those external + clocks must be defined as fixed-rate clocks in dts. + + CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and + dividers; all other leaf clocks (other CMUs) are usually derived from CMU_TOP. + + Each clock is assigned an identifier and client nodes can use this identifier + to specify the clock which they consume. All clocks that available for usage
s/All clocks that available/All clocks available ? No need to resend, I can amend it when applying.
