This patch adds document for mediatek adsp mbox Signed-off-by: Allen-KH Cheng <Allen-KH.Cheng@xxxxxxxxxxxx> --- .../bindings/mailbox/mtk,adsp-mbox.yaml | 76 +++++++++++++++++++ 1 file changed, 76 insertions(+) create mode 100644 Documentation/devicetree/bindings/mailbox/mtk,adsp-mbox.yaml diff --git a/Documentation/devicetree/bindings/mailbox/mtk,adsp-mbox.yaml b/Documentation/devicetree/bindings/mailbox/mtk,adsp-mbox.yaml new file mode 100644 index 000000000000..9028e403ceda --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/mtk,adsp-mbox.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mailbox/mtk,adsp-mbox.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek ADSP mailbox + +maintainers: + - Allen-KH Cheng <Allen-KH.Cheng@xxxxxxxxxxxx> + +description: | + The MTK ADSP mailbox Inter-Processor Communication (IPC) enables the SoC + to ommunicate with ADSP by passing messages through two mailbox channels. + The MTK ADSP mailbox IPC also provides the ability for one processor to + signal the other processor using interrupts. + + mbox0 is handling ipc reply + mbox1 is handling ipc request + +properties: + compatible: + items: + - const: mediatek,mt8195-adsp-mbox + + "#mbox-cells": + const: 1 + + reg: + description: + Physical address base for dsp mbox base registers. + maxItems: 2 + minItems: 2 + + reg-names: + items: + - const: reg_mbox0 + - const: reg_mbox1 + + interrupts: + description: + adsp mbox interrupt + maxItems: 2 + minItems: 2 + + interrupt-names: + items: + - const: irq_mbox0 + - const: irq_mbox1 + +required: + - compatible + - "#mbox-cells" + - reg + - reg-names + - interrupts + - interrupt-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + + adsp_mailbox:adsp_mailbox@10816000 { + compatible = "mediatek,mt8195-adsp-mbox"; + #mbox-cells = <1>; + reg = <0x10816000 0x1000>, + <0x10817000 0x1000>; + reg-names = "reg_mbox0", "reg_mbox1"; + interrupts = <GIC_SPI 702 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 703 IRQ_TYPE_LEVEL_HIGH 0>; + interrupt-names = "irq_mbox0", "irq_mbox1"; + }; + -- 2.18.0
