Override the I2Cs, LPUARTs, audio_ipg_clk and dma_ipg_clk with the i.MX8DXL specific properties. Signed-off-by: Clark Wang <xiaoning.wang@xxxxxxx> Signed-off-by: Jacky Bai <ping.bai@xxxxxxx> Signed-off-by: Abel Vesa <abel.vesa@xxxxxxx> --- .../boot/dts/freescale/imx8dxl-ss-adma.dtsi | 53 +++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi new file mode 100644 index 000000000000..eccc31ee8f1b --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi @@ -0,0 +1,53 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019-2021 NXP + */ + +&audio_ipg_clk { + clock-frequency = <160000000>; +}; + +&dma_ipg_clk { + clock-frequency = <160000000>; +}; + +&i2c0 { + compatible = "fsl,imx8dxl-lpi2c", "fsl,imx7ulp-lpi2c"; + interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>; +}; + +&i2c1 { + compatible = "fsl,imx8dxl-lpi2c", "fsl,imx7ulp-lpi2c"; + interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>; +}; + +&i2c2 { + compatible = "fsl,imx8dxl-lpi2c", "fsl,imx7ulp-lpi2c"; + interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; +}; + +&i2c3 { + compatible = "fsl,imx8dxl-lpi2c", "fsl,imx7ulp-lpi2c"; + interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; +}; + +&lpuart0 { + compatible = "fsl,imx8dxl-lpuart", "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart"; + interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>; +}; + +&lpuart1 { + compatible = "fsl,imx8dxl-lpuart", "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart"; + interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>; +}; + +&lpuart2 { + compatible = "fsl,imx8dxl-lpuart", "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart"; + interrupts = <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>; +}; + +&lpuart3 { + compatible = "fsl,imx8dxl-lpuart", "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart"; + interrupts = <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>; +}; + -- 2.31.1