On Wed, Oct 6, 2021 at 2:39 AM Lucas Stach <l.stach@xxxxxxxxxxxxxx> wrote: > > Am Dienstag, dem 05.10.2021 um 19:04 -0500 schrieb Adam Ford: > > This adds the DT binding for the i.MX8MN DISP blk-ctrl. > > > > Signed-off-by: Adam Ford <aford173@xxxxxxxxx> > > --- > > .../soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml | 97 +++++++++++++++++++ > > 1 file changed, 97 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml > > > > diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml > > new file mode 100644 > > index 000000000000..92d30aff446e > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml > > @@ -0,0 +1,97 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml# > > mm -> mn in the file name. Oops, I missed one. Thanks for catching. > > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: NXP i.MX8MN DISP blk-ctrl > > + > > +maintainers: > > + - Lucas Stach <l.stach@xxxxxxxxxxxxxx> > > I'm not opposed to being maintainer for this file, just making sure > that this is what you intended. Because this yaml file points to the driver you wrote, I thought it made sense to have you be the maintainer. In hindsight, I should have asked first. Sorry about that. > > Other than that I think this looks okay. Thanks for reviewing the series. I'll try to get a V2 prepared tomorrow, and I'll wait a little bit to send it, just in case NXP wants to give some feedback as well. adam > > Regards, > Lucas > > > + > > +description: > > + The i.MX8MN DISP blk-ctrl is a top-level peripheral providing access to > > + the NoC and ensuring proper power sequencing of the display and MIPI CSI > > + peripherals located in the DISP domain of the SoC. > > + > > +properties: > > + compatible: > > + items: > > + - const: fsl,imx8mn-disp-blk-ctrl > > + - const: syscon > > + > > + reg: > > + maxItems: 1 > > + > > + '#power-domain-cells': > > + const: 1 > > + > > + power-domains: > > + minItems: 5 > > + maxItems: 5 > > + > > + power-domain-names: > > + items: > > + - const: bus > > + - const: isi > > + - const: lcdif > > + - const: mipi-dsi > > + - const: mipi-csi > > + > > + clocks: > > + minItems: 11 > > + maxItems: 11 > > + > > + clock-names: > > + items: > > + - const: disp_axi > > + - const: disp_apb > > + - const: disp_axi_root > > + - const: disp_apb_root > > + - const: lcdif-axi > > + - const: lcdif-apb > > + - const: lcdif-pix > > + - const: dsi-pclk > > + - const: dsi-ref > > + - const: csi-aclk > > + - const: csi-pclk > > + > > +required: > > + - compatible > > + - reg > > + - power-domains > > + - power-domain-names > > + - clocks > > + - clock-names > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + #include <dt-bindings/clock/imx8mn-clock.h> > > + #include <dt-bindings/power/imx8mn-power.h> > > + > > + disp_blk_ctl: blk_ctrl@32e28000 { > > + compatible = "fsl,imx8mn-disp-blk-ctrl", "syscon"; > > + reg = <0x32e28000 0x100>; > > + power-domains = <&pgc_dispmix>, <&pgc_dispmix>, > > + <&pgc_dispmix>, <&pgc_mipi>, > > + <&pgc_mipi>; > > + power-domain-names = "bus", "isi", "lcdif", "mipi-dsi", > > + "mipi-csi"; > > + clocks = <&clk IMX8MN_CLK_DISP_AXI>, > > + <&clk IMX8MN_CLK_DISP_APB>, > > + <&clk IMX8MN_CLK_DISP_AXI_ROOT>, > > + <&clk IMX8MN_CLK_DISP_APB_ROOT>, > > + <&clk IMX8MN_CLK_DISP_AXI_ROOT>, > > + <&clk IMX8MN_CLK_DISP_APB_ROOT>, > > + <&clk IMX8MN_CLK_DISP_PIXEL_ROOT>, > > + <&clk IMX8MN_CLK_DSI_CORE>, > > + <&clk IMX8MN_CLK_DSI_PHY_REF>, > > + <&clk IMX8MN_CLK_CSI1_PHY_REF>, > > + <&clk IMX8MN_CLK_CAMERA_PIXEL_ROOT>; > > + clock-names = "disp_axi", "disp_apb", "disp_axi_root", "disp_apb_root", > > + "lcdif-axi", "lcdif-apb", "lcdif-pix", "dsi-pclk", > > + "dsi-ref", "csi-aclk", "csi-pclk"; > > + #power-domain-cells = <1>; > > + }; > >
