This adds a binding for the Xilinx 1G/2.5G Ethernet PCS/PMA or SGMII LogiCORE IP. This device is a soft device typically used to adapt between GMII and SGMII or 1000BASE-X (in combination with a suitable SERDES). The standard property is roughly analogous to the interface property of ethernet controllers, except that it has an additional value used to indicate that dynamic switching is supported. Note that switching is supported only between SGMII and 1000BASE-X, and only if the appropriate parameter is set when the device is synthesized. The property name was chosen to align with the terminology in the datasheet. I also considered "mdi", but that is a bit of a misnomer in the case of SGMII. Signed-off-by: Sean Anderson <sean.anderson@xxxxxxxx> --- .../devicetree/bindings/net/xilinx,pcs.yaml | 83 +++++++++++++++++++ 1 file changed, 83 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/xilinx,pcs.yaml diff --git a/Documentation/devicetree/bindings/net/xilinx,pcs.yaml b/Documentation/devicetree/bindings/net/xilinx,pcs.yaml new file mode 100644 index 000000000000..43750dcb4b11 --- /dev/null +++ b/Documentation/devicetree/bindings/net/xilinx,pcs.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/xilinx,pcs.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx 1G/2.5G Ethernet PCS/PMA or SGMII LogiCORE IP + +maintainers: + - Sean Anderson <sean.anderson@xxxxxxxx> + +description: + This is a soft device which converts between GMII and SGMII, 2.5G SGMII, + 1000BASE-X, or 2500BASE-X. It may have an attached SERDES, or may talk + directly to LVDS. + +allOf: + - $ref: "ethernet-controller.yaml#" + +properties: + compatible: + contains: + const: + - xilinx,pcs-16.2 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + items: + - description: The reference clock for the PMD, which is typically a + SERDES but may be a direct interface to LVDS I/Os. + Depending on your setup, this may be the gtrefclk, refclk, + or clk125m signal. + + clock-names: + const: refclk + + resets: + maxItems: 1 + + reset-names: + const: pcs + + standard: + description: + The interface standard that the PCS supports. The sgmii/1000base-x + setting indicates that the PCS supports dynamically switching between + SGMII and 1000BASE-X. + enum: + - sgmii + - 1000base-x + - sgmii/1000base-x + - 2500base-x + +required: + - compatible + - reg + - clocks + - clock-names + - resets + - reset-names + - standard + +additionalProperties: false + +examples: + - | + mdio { + #address-cells = <1>; + #size-cells = <0>; + + pcs0: ethernet-pcs@0 { + compatible = "xlnx,pcs-16.2"; + reg = <0>; + clocks = <&si570>; + clock-names = "refclk"; + resets = <&pcs_reset 1>; + reset-names = "pcs"; + standard = "sgmii/1000base-x"; + }; + }; -- 2.25.1
