On Mon 04 Oct 02:32 PDT 2021, Rakesh Pillai wrote:
> Add the WPSS remoteproc node in dts for
> PIL loading.
>
> Signed-off-by: Rakesh Pillai <pillair@xxxxxxxxxxxxxx>
qcom,sc7280-wpss-pil isn't a compatible that's documented or implemented
upstream, so I can't do anything with this patch.
I did go back an looked for the binding and driver and made a comment
regarding auto_boot. My comment/question still stands, but I see I made
that comment on v1, which is the last version you sent to the
linux-remoteproc@ mailing list.
Unfortunately the dt binding in v6 seem to have some issues still.
So based on that, I will have to ignore this patch until the binding has
landed - please help me remember this forward dependency when that day
comes.
And please include linux-remoteproc@ if you want the binding & driver
merged.
Regards,
Bjorn
> ---
> arch/arm64/boot/dts/qcom/sc7280-idp.dts | 4 +++
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 58 +++++++++++++++++++++++++++++++++
> 2 files changed, 62 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dts b/arch/arm64/boot/dts/qcom/sc7280-idp.dts
> index 64fc22a..2b8bbcd 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dts
> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dts
> @@ -68,3 +68,7 @@
> qcom,pre-scaling = <1 1>;
> };
> };
> +
> +&remoteproc_wpss {
> + status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 39635da..edc7951 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -134,6 +134,11 @@
> no-map;
> };
>
> + wpss_mem: memory@9ae00000 {
> + no-map;
> + reg = <0x0 0x9ae00000 0x0 0x1900000>;
> + };
> +
> rmtfs_mem: memory@9c900000 {
> compatible = "qcom,rmtfs-mem";
> reg = <0x0 0x9c900000 0x0 0x280000>;
> @@ -2588,6 +2593,59 @@
> #power-domain-cells = <1>;
> };
>
> + remoteproc_wpss: remoteproc@8a00000 {
> + compatible = "qcom,sc7280-wpss-pil";
> + reg = <0 0x08a00000 0 0x10000>;
> +
> + interrupts-extended = <&intc GIC_SPI 587 IRQ_TYPE_EDGE_RISING>,
> + <&wpss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
> + <&wpss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
> + <&wpss_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
> + <&wpss_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
> + <&wpss_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "wdog", "fatal", "ready", "handover",
> + "stop-ack", "shutdown-ack";
> +
> + clocks = <&gcc GCC_WPSS_AHB_BDG_MST_CLK>,
> + <&gcc GCC_WPSS_AHB_CLK>,
> + <&gcc GCC_WPSS_RSCP_CLK>,
> + <&rpmhcc RPMH_CXO_CLK>;
> + clock-names = "gcc_wpss_ahb_bdg_mst_clk",
> + "gcc_wpss_ahb_clk",
> + "gcc_wpss_rscp_clk",
> + "xo";
> +
> + power-domains = <&rpmhpd SC7280_CX>,
> + <&rpmhpd SC7280_MX>;
> + power-domain-names = "cx", "mx";
> +
> + memory-region = <&wpss_mem>;
> +
> + qcom,qmp = <&aoss_qmp>;
> +
> + qcom,smem-states = <&wpss_smp2p_out 0>;
> + qcom,smem-state-names = "stop";
> +
> + resets = <&aoss_reset AOSS_CC_WCSS_RESTART>,
> + <&pdc_reset PDC_WPSS_SYNC_RESET>;
> + reset-names = "restart", "pdc_sync";
> +
> + qcom,halt-regs = <&tcsr_mutex 0x37000>;
> +
> + status = "disabled";
> +
> + glink-edge {
> + interrupts-extended = <&ipcc IPCC_CLIENT_WPSS
> + IPCC_MPROC_SIGNAL_GLINK_QMP
> + IRQ_TYPE_EDGE_RISING>;
> + mboxes = <&ipcc IPCC_CLIENT_WPSS
> + IPCC_MPROC_SIGNAL_GLINK_QMP>;
> +
> + label = "wpss";
> + qcom,remote-pid = <13>;
> + };
> + };
> +
> pdc: interrupt-controller@b220000 {
> compatible = "qcom,sc7280-pdc", "qcom,pdc";
> reg = <0 0x0b220000 0 0x30000>;
> --
> 2.7.4
>
