Support memory chip identification by LPDDR2 configuration, which is
needed by ASUS Transformer TF101 tablet device that doesn't store RAMCODE
in Tegra's NVMEM.
Changelog:
v3: - Corrected sub-node name in tegra20-emc.yaml.
v2: - Added separate binding for standard LPDDR2 properties, like it
was suggested by Krzysztof Kozlowski.
- Switched Tegra binding to use new lpddr2-configuration sub-node
that contains the standard properties.
- Extended commit message of the "emc: Document new LPDDR2 sub-node"
patch, telling how the properties are supposed to be used, which
was requested by Krzysztof Kozlowski.
- Added new common helpers for parsing LPDDR2 properties and made
tegra20-emc driver to use these helpers.
Dmitry Osipenko (4):
dt-bindings: memory: Add LPDDR2 binding
dt-bindings: memory: tegra20: emc: Document new LPDDR2 sub-node
memory: Add LPDDR2 configuration helpers
memory: tegra20-emc: Support matching timings by LPDDR2 configuration
.../memory-controllers/jedec,lpddr2.yaml | 80 ++++++++
.../nvidia,tegra20-emc.yaml | 17 +-
drivers/memory/jedec_ddr.h | 21 ++
drivers/memory/jedec_ddr_data.c | 42 ++++
drivers/memory/of_memory.c | 34 ++++
drivers/memory/of_memory.h | 9 +
drivers/memory/tegra/Kconfig | 1 +
drivers/memory/tegra/tegra20-emc.c | 191 ++++++++++++++++--
include/dt-bindings/memory/lpddr2.h | 25 +++
9 files changed, 404 insertions(+), 16 deletions(-)
create mode 100644 Documentation/devicetree/bindings/memory-controllers/jedec,lpddr2.yaml
create mode 100644 include/dt-bindings/memory/lpddr2.h
--
2.32.0
