Hi,
> #define RPCIF_CMNCR_IO3FV(val) (((val) & 0x3) << 14) /* undocumented */
> #define RPCIF_CMNCR_IO2FV(val) (((val) & 0x3) << 12) /* undocumented */
> #define RPCIF_CMNCR_IO0FV(val) (((val) & 0x3) << 8)
> -#define RPCIF_CMNCR_IOFV_HIZ (RPCIF_CMNCR_IO0FV(3) | RPCIF_CMNCR_IO2FV(3) | \
> - RPCIF_CMNCR_IO3FV(3))
> +#define RPCIF_CMNCR_IOFV_HIZ(val) (RPCIF_CMNCR_IO0FV(val) | RPCIF_CMNCR_IO2FV(val) | \
> + RPCIF_CMNCR_IO3FV(val))
Is RPCIF_CMNCR_IO3FV and RPCIF_CMNCR_IO2FV actually documented in your
datasheets? I am asking because I have a patch pending to remove writing
to undocumented locations. So, I was aboout to remove the IO3FV and
IO2FV macros.
> +#define RPCIF_PHYADJ1 0x0070 /* R/W */
> +#define RPCIF_PHYADJ2 0x0074 /* R/W */
Those are named 'PHYADD' and 'PHYWR' in the Gen3 documentation. They are
only available on a few of the Gen3 SoCs. I think the Gen3 namings make
more sense because then it becomes easily understandable that the
registers are used to write something to the PHY.
> +#define RPCIF_PHYCNT_CKSEL(v) (((v) & 0x3) << 16)
We should add a comment here that these bits are only valid for G2L...
> #define RPCIF_PHYCNT_STRTIM(v) (((v) & 0x7) << 15)
and these only for Gen3.
> +static void rpcif_timing_adjust_sdr(struct rpcif *rpc)
> +{
> + u32 data;
> +
> + regmap_write(rpc->regmap, RPCIF_PHYADJ2, 0xA5390000);
> + regmap_write(rpc->regmap, RPCIF_PHYADJ1, 0x80000000);
> + regmap_write(rpc->regmap, RPCIF_PHYADJ2, 0x00008080);
> + regmap_write(rpc->regmap, RPCIF_PHYADJ1, 0x80000022);
> + regmap_write(rpc->regmap, RPCIF_PHYADJ2, 0x00008080);
> + regmap_write(rpc->regmap, RPCIF_PHYADJ1, 0x80000024);
Can't we have defines for these magic values? At least in my latest Gen3
documentation, these values are explained.
> +
> + regmap_read(rpc->regmap, RPCIF_PHYCNT, &data);
> + regmap_write(rpc->regmap, RPCIF_PHYCNT, data | RPCIF_PHYCNT_CKSEL(3));
regmap_update_bits?
> + if (rpc->type == RPCIF_RCAR_GEN3) {
> + regmap_write(rpc->regmap, RPCIF_PHYCNT, RPCIF_PHYCNT_STRTIM(7) |
> + RPCIF_PHYCNT_PHYMEM(hyperflash ? 3 : 0) | 0x260);
> + } else {
> + regmap_read(rpc->regmap, RPCIF_PHYCNT, &dummy);
> + dummy &= ~RPCIF_PHYCNT_PHYMEM_MASK;
> + dummy |= RPCIF_PHYCNT_PHYMEM(hyperflash ? 3 : 0) | 0x260;
> + regmap_write(rpc->regmap, RPCIF_PHYCNT, dummy);
regmap_update_bits?
Rest looks good.
Thanks and happy hacking!
Wolfram
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