Add bindings to describe Mediatek MT8195 HDMI PHY Signed-off-by: Guillaume Ranquet <granquet@xxxxxxxxxxxx> --- .../phy/mediatek,mtk8195-hdmi-phy.yaml | 70 +++++++++++++++++++ 1 file changed, 70 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/mediatek,mtk8195-hdmi-phy.yaml diff --git a/Documentation/devicetree/bindings/phy/mediatek,mtk8195-hdmi-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,mtk8195-hdmi-phy.yaml new file mode 100644 index 0000000000000..6b39bb8c9dfe7 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/mediatek,mtk8195-hdmi-phy.yaml @@ -0,0 +1,70 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (c) 2020 MediaTek +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/mediatek,hdmi-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek High Definition Multimedia Interface (HDMI) PHY binding for mt8195 + +maintainers: + - Chun-Kuang Hu <chunkuang.hu@xxxxxxxxxx> + - Philipp Zabel <p.zabel@xxxxxxxxxxxxxx> + - Chunfeng Yun <chunfeng.yun@xxxxxxxxxxxx> + +description: | + The HDMI PHY serializes the HDMI encoder's three channel 10-bit parallel + output and drives the HDMI pads. + +properties: + $nodename: + pattern: "^hdmi-phy@[0-9a-f]+$" + + compatible: + - const: mediatek,mt8195-hdmi-phy + + reg: + maxItems: 1 + + clocks: + items: + - description: PLL reference clock + + clock-names: + items: + - const: hdmi_xtal_sel + + clock-output-names: + items: + - const: hdmi_txpll + + "#phy-cells": + const: 0 + + "#clock-cells": + const: 0 + +required: + - compatible + - reg + - clocks + - clock-names + - clock-output-names + - "#phy-cells" + - "#clock-cells" + +additionalProperties: false + +examples: + - | + hdmi_phy: hdmi-phy@11d5f000 { + compatible = "mediatek,mt8195-hdmi-phy"; + reg = <0 0x11d5f000 0 0x100>; + clocks = <&topckgen 77>; + clock-names = "hdmi_xtal_sel"; + clock-output-names = "hdmi_txpll"; + #clock-cells = <0>; + #phy-cells = <0>; + }; + +... -- 2.32.0
