'#clock-cells' is a required property of QMP PHY child node, not itself.
Move it to fix the dtbs_check warnings.
There are only '#clock-cells' removal from SM8350 QMP PHY nodes, because
child nodes already have the property.
Signed-off-by: Shawn Guo <shawn.guo@xxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++--
arch/arm64/boot/dts/qcom/msm8996.dtsi | 4 ++--
arch/arm64/boot/dts/qcom/msm8998.dtsi | 2 +-
arch/arm64/boot/dts/qcom/sm8350.dtsi | 3 ---
4 files changed, 5 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index db333001df4d..0c7dbdc861c1 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -91,7 +91,6 @@
ssphy_1: phy@58000 {
compatible = "qcom,ipq8074-qmp-usb3-phy";
reg = <0x00058000 0x1c4>;
- #clock-cells = <1>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
@@ -112,6 +111,7 @@
<0x00058800 0x1f8>, /* PCS */
<0x00058600 0x044>; /* PCS misc*/
#phy-cells = <0>;
+ #clock-cells = <1>;
clocks = <&gcc GCC_USB1_PIPE_CLK>;
clock-names = "pipe0";
clock-output-names = "gcc_usb1_pipe_clk_src";
@@ -134,7 +134,6 @@
ssphy_0: phy@78000 {
compatible = "qcom,ipq8074-qmp-usb3-phy";
reg = <0x00078000 0x1c4>;
- #clock-cells = <1>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
@@ -155,6 +154,7 @@
<0x00078800 0x1f8>, /* PCS */
<0x00078600 0x044>; /* PCS misc*/
#phy-cells = <0>;
+ #clock-cells = <1>;
clocks = <&gcc GCC_USB0_PIPE_CLK>;
clock-names = "pipe0";
clock-output-names = "gcc_usb0_pipe_clk_src";
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 52df22ab3f6a..a190ed891a62 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -582,7 +582,6 @@
pcie_phy: phy@34000 {
compatible = "qcom,msm8996-qmp-pcie-phy";
reg = <0x00034000 0x488>;
- #clock-cells = <1>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
@@ -604,6 +603,7 @@
<0x00035400 0x1dc>;
#phy-cells = <0>;
+ #clock-cells = <1>;
clock-output-names = "pcie_0_pipe_clk_src";
clocks = <&gcc GCC_PCIE_0_PIPE_CLK>;
clock-names = "pipe0";
@@ -2586,7 +2586,6 @@
usb3phy: phy@7410000 {
compatible = "qcom,msm8996-qmp-usb3-phy";
reg = <0x07410000 0x1c4>;
- #clock-cells = <1>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
@@ -2607,6 +2606,7 @@
<0x07410600 0x1a8>;
#phy-cells = <0>;
+ #clock-cells = <1>;
clock-output-names = "usb3_phy_pipe_clk_src";
clocks = <&gcc GCC_USB3_PHY_PIPE_CLK>;
clock-names = "pipe0";
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index 34039b5c8017..f3bd1197d65e 100644
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -1981,7 +1981,6 @@
compatible = "qcom,msm8998-qmp-usb3-phy";
reg = <0x0c010000 0x18c>;
status = "disabled";
- #clock-cells = <1>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
@@ -2002,6 +2001,7 @@
<0xc010600 0x128>,
<0xc010800 0x200>;
#phy-cells = <0>;
+ #clock-cells = <1>;
clocks = <&gcc GCC_USB3_PHY_PIPE_CLK>;
clock-names = "pipe0";
clock-output-names = "usb3_phy_pipe_clk_src";
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index e91cd8a5e535..9c44e62a9cd9 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -1070,7 +1070,6 @@
reg = <0 0x01d87000 0 0xe10>;
#address-cells = <2>;
#size-cells = <2>;
- #clock-cells = <1>;
ranges;
clock-names = "ref",
"ref_aux";
@@ -1205,7 +1204,6 @@
<0 0x088e8000 0 0x20>;
reg-names = "reg-base", "dp_com";
status = "disabled";
- #clock-cells = <1>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
@@ -1238,7 +1236,6 @@
compatible = "qcom,sm8350-qmp-usb3-uni-phy";
reg = <0 0x088eb000 0 0x200>;
status = "disabled";
- #clock-cells = <1>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
--
2.17.1
