The document was merged as commit 1afc60e00de3 ("dt-bindings:
mediatek: mt8192: add audio afe document").
However, [1] revealed that the commit 1afc60e00de3 breaks
dt_binding_check due to dt-bindings/clock/mt8192-clk.h doesn't
exist.
As a temporary fix, commit 7d94ca3c8acd ("ASoC: mt8192: revert
add audio afe document") reverted commit 1afc60e00de3.
dt-bindings/clock/mt8192-clk.h is in mainline per commit
f35f1a23e0e1 ("clk: mediatek: Add dt-bindings of MT8192 clocks").
Re-adds the document back.
[1]: https://mailman.alsa-project.org/pipermail/alsa-devel/2020-November/176873.html
Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
Signed-off-by: Tzung-Bi Shih <tzungbi@xxxxxxxxxx>
---
.../bindings/sound/mt8192-afe-pcm.yaml | 100 ++++++++++++++++++
1 file changed, 100 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml
diff --git a/Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml b/Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml
new file mode 100644
index 000000000000..5e9fe067f440
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml
@@ -0,0 +1,100 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/mt8192-afe-pcm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Mediatek AFE PCM controller for mt8192
+
+maintainers:
+ - Jiaxin Yu <jiaxin.yu@xxxxxxxxxxxx>
+ - Shane Chien <shane.chien@xxxxxxxxxxxx>
+
+properties:
+ compatible:
+ const: mediatek,mt8192-audio
+
+ interrupts:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+ reset-names:
+ const: audiosys
+
+ mediatek,apmixedsys:
+ $ref: "/schemas/types.yaml#/definitions/phandle"
+ description: The phandle of the mediatek apmixedsys controller
+
+ mediatek,infracfg:
+ $ref: "/schemas/types.yaml#/definitions/phandle"
+ description: The phandle of the mediatek infracfg controller
+
+ mediatek,topckgen:
+ $ref: "/schemas/types.yaml#/definitions/phandle"
+ description: The phandle of the mediatek topckgen controller
+
+ power-domains:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: AFE clock
+ - description: ADDA DAC clock
+ - description: ADDA DAC pre-distortion clock
+ - description: audio infra sys clock
+ - description: audio infra 26M clock
+
+ clock-names:
+ items:
+ - const: aud_afe_clk
+ - const: aud_dac_clk
+ - const: aud_dac_predis_clk
+ - const: aud_infra_clk
+ - const: aud_infra_26m_clk
+
+required:
+ - compatible
+ - interrupts
+ - resets
+ - reset-names
+ - mediatek,apmixedsys
+ - mediatek,infracfg
+ - mediatek,topckgen
+ - power-domains
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/mt8192-clk.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/power/mt8192-power.h>
+ #include <dt-bindings/reset-controller/mt8192-resets.h>
+
+ afe: mt8192-afe-pcm {
+ compatible = "mediatek,mt8192-audio";
+ interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&watchdog MT8192_TOPRGU_AUDIO_SW_RST>;
+ reset-names = "audiosys";
+ mediatek,apmixedsys = <&apmixedsys>;
+ mediatek,infracfg = <&infracfg>;
+ mediatek,topckgen = <&topckgen>;
+ power-domains = <&scpsys MT8192_POWER_DOMAIN_AUDIO>;
+ clocks = <&audsys CLK_AUD_AFE>,
+ <&audsys CLK_AUD_DAC>,
+ <&audsys CLK_AUD_DAC_PREDIS>,
+ <&infracfg CLK_INFRA_AUDIO>,
+ <&infracfg CLK_INFRA_AUDIO_26M_B>;
+ clock-names = "aud_afe_clk",
+ "aud_dac_clk",
+ "aud_dac_predis_clk",
+ "aud_infra_clk",
+ "aud_infra_26m_clk";
+ };
+
+...
--
2.33.0.685.g46640cef36-goog
