Enable USB2.0 Host/Device support on RZ/G2L SMARC EVK.
Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi | 61 ++++++++++++++++++++
1 file changed, 61 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
index 0987163f25ee..7ecd4a3f4175 100644
--- a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
@@ -17,17 +17,63 @@
bootargs = "ignore_loglevel";
stdout-path = "serial0:115200n8";
};
+
+ usb0_vbus_otg: regulator-usb0-vbus-otg {
+ compatible = "regulator-fixed";
+
+ regulator-name = "USB0_VBUS_OTG";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+};
+
+&ehci0 {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
};
&extal_clk {
clock-frequency = <24000000>;
};
+&hsusb {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&ohci0 {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&phyrst {
+ status = "okay";
+};
+
&pinctrl {
scif0_pins: scif0 {
pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>, /* TxD */
<RZG2L_PORT_PINMUX(38, 1, 1)>; /* RxD */
};
+
+ usb0_pins: usb0 {
+ pinmux = <RZG2L_PORT_PINMUX(4, 0, 1)>, /* VBUS */
+ <RZG2L_PORT_PINMUX(5, 0, 1)>, /* OVC */
+ <RZG2L_PORT_PINMUX(5, 1, 1)>; /* OTG_ID */
+ };
+
+ usb1_pins: usb1 {
+ pinmux = <RZG2L_PORT_PINMUX(42, 0, 1)>, /* VBUS */
+ <RZG2L_PORT_PINMUX(42, 1, 1)>; /* OVC */
+ };
};
&scif0 {
@@ -35,3 +81,18 @@
pinctrl-names = "default";
status = "okay";
};
+
+&usb2_phy0 {
+ pinctrl-0 = <&usb0_pins>;
+ pinctrl-names = "default";
+
+ vbus-supply = <&usb0_vbus_otg>;
+ status = "okay";
+};
+
+&usb2_phy1 {
+ pinctrl-0 = <&usb1_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
--
2.17.1
