On 30/08/2021 17:59, Sungbo Eo wrote:
MT7623 has an musb controller that is compatible with the one from MT2701. Signed-off-by: Sungbo Eo <mans0n@xxxxxxxxxx> Tested-by: Frank Wunderlich <frank-w@xxxxxxxxxxxxxxx>
Applied to v5.15-next/dts32 Thanks
--- v4: * add tested by Frank v3: * remove unnecessary status=okay from u2port2 v2: * rename usb3 label to usb0 * move usb0 & u2phy1 nodes to the right sorted place * disable u2phy1 by default * correct u2port2 node name to match its reg address --- arch/arm/boot/dts/mt7623.dtsi | 33 +++++++++++++++++++++++++++++++++ arch/arm/boot/dts/mt7623a.dtsi | 4 ++++ 2 files changed, 37 insertions(+) diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi index 3c11f7cfcc40..21c8a291b74e 100644 --- a/arch/arm/boot/dts/mt7623.dtsi +++ b/arch/arm/boot/dts/mt7623.dtsi @@ -585,6 +585,39 @@ spi2: spi@11017000 { status = "disabled"; };+ usb0: usb@11200000 {+ compatible = "mediatek,mt7623-musb", + "mediatek,mtk-musb"; + reg = <0 0x11200000 0 0x1000>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "mc"; + phys = <&u2port2 PHY_TYPE_USB2>; + dr_mode = "otg"; + clocks = <&pericfg CLK_PERI_USB0>, + <&pericfg CLK_PERI_USB0_MCU>, + <&pericfg CLK_PERI_USB_SLV>; + clock-names = "main","mcu","univpll"; + power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>; + status = "disabled"; + }; + + u2phy1: t-phy@11210000 { + compatible = "mediatek,mt7623-tphy", + "mediatek,generic-tphy-v1"; + reg = <0 0x11210000 0 0x0800>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + status = "disabled"; + + u2port2: usb-phy@11210800 { + reg = <0 0x11210800 0 0x0100>; + clocks = <&topckgen CLK_TOP_USB_PHY48M>; + clock-names = "ref"; + #phy-cells = <1>; + }; + }; + audsys: clock-controller@11220000 { compatible = "mediatek,mt7623-audsys", "mediatek,mt2701-audsys", diff --git a/arch/arm/boot/dts/mt7623a.dtsi b/arch/arm/boot/dts/mt7623a.dtsi index 0735a1fb8ad9..d304b62d24b5 100644 --- a/arch/arm/boot/dts/mt7623a.dtsi +++ b/arch/arm/boot/dts/mt7623a.dtsi @@ -35,6 +35,10 @@ &scpsys { clock-names = "ethif"; };+&usb0 {+ power-domains = <&scpsys MT7623A_POWER_DOMAIN_IFR_MSC>; +}; + &usb1 { power-domains = <&scpsys MT7623A_POWER_DOMAIN_HIF>; };
