On Mon, 2021-08-23 at 20:13 +0800, Chen-Yu Tsai wrote: > On Fri, Aug 20, 2021 at 7:23 PM Chun-Jie Chen > <chun-jie.chen@xxxxxxxxxxxx> wrote: > > > > Add MT8195 ccusys clock controller which provides clock gate > > control in Camera Computing Unit. > > Could you offer a bit more explanation about this unit? Is it an ISP? > Or some other function that does computation on images? > CCU could access ISP HW control register and could be used for ISP pipeline control. The use case is like secure camera or doing post- processing on ISP statistic data. Thanks! Best Regards, Chun-Jie > > Signed-off-by: Chun-Jie Chen <chun-jie.chen@xxxxxxxxxxxx> > > Reviewed-by: Chen-Yu Tsai <wenst@xxxxxxxxxxxx> > > --- > > drivers/clk/mediatek/Makefile | 3 +- > > drivers/clk/mediatek/clk-mt8195-ccu.c | 50 > > +++++++++++++++++++++++++++ > > 2 files changed, 52 insertions(+), 1 deletion(-) > > create mode 100644 drivers/clk/mediatek/clk-mt8195-ccu.c > > > > diff --git a/drivers/clk/mediatek/Makefile > > b/drivers/clk/mediatek/Makefile > > index 718bbb04191b..03fb020834f3 100644 > > --- a/drivers/clk/mediatek/Makefile > > +++ b/drivers/clk/mediatek/Makefile > > @@ -80,6 +80,7 @@ obj-$(CONFIG_COMMON_CLK_MT8192_MSDC) += clk- > > mt8192-msdc.o > > obj-$(CONFIG_COMMON_CLK_MT8192_SCP_ADSP) += clk-mt8192-scp_adsp.o > > obj-$(CONFIG_COMMON_CLK_MT8192_VDECSYS) += clk-mt8192-vdec.o > > obj-$(CONFIG_COMMON_CLK_MT8192_VENCSYS) += clk-mt8192-venc.o > > -obj-$(CONFIG_COMMON_CLK_MT8195) += clk-mt8195-apmixedsys.o clk- > > mt8195-topckgen.o clk-mt8195-peri_ao.o clk-mt8195-infra_ao.o clk- > > mt8195-cam.o > > +obj-$(CONFIG_COMMON_CLK_MT8195) += clk-mt8195-apmixedsys.o clk- > > mt8195-topckgen.o clk-mt8195-peri_ao.o clk-mt8195-infra_ao.o clk- > > mt8195-cam.o \ > > + clk-mt8195-ccu.o > > When wrapping, please align with previous line. "clk-mt8195-ccu.o" > should > align with "clk-mt8195-apmixedsys.o". > > > ChenYu
