Hello, Here I'd like to propose a patchset, which is initial upstream support for NXP S32G2. S32G is a processor family developed by NXP for automotive solutions, such as vehicle networking and automotive high-performance processing. This series focuses on S32G2, which is the latest generation we can find at the moment. As the first round to support S32G2, this patchset only enables basic components and interfaces the SoC must have while kernel booting, which aims to have minimum hardware enablement for these two boards, S32G-VNP-EVB and S32G-VNP-RDB2. The concepts of how these boards work are originated from the downstream kernel tree[1] developed by NXP, which provides lots of details about the SoC S32G274A and its integrated boards. This series has been verified with downstream ATF[2] & U-Boot[3] based on the ATF boot flow. Thanks, Chester [1] https://source.codeaurora.org/external/autobsps32/linux/ [2] https://source.codeaurora.org/external/autobsps32/arm-trusted-firmware/ [3] https://source.codeaurora.org/external/autobsps32/u-boot/ Changes in v2: - dt-bindings: - Rename the compatible vendor string to "nxp," for s32g2. - Drop the specific description "S32V234 SoC". - Fill my name in the maintainer field. I tried to contact the authors of fsl,s32-linflexuart.txt but got no response. - Remove redundant minItems/maxItems from compatible properties. - Remove the redundant example from fsl,s32-linflexuart.yaml. - dtsi/dts: - Add a SoC description in s32g2.dtsi. - Add an interrupt-affinity to the pmu node. - Move the psci node into the "/firmware" node. - Remove the redundant properties and white lines in DT. - Remove the wrong interrupt specifier from the gic node. - Specify the range and cell-size of /soc [0 - 4 GiB]. - Correct the reserved size of GICR to 512Kbytes [0x80000]. - Add new Signed-off-by to the DT uart patch. - Fix copyright strings. - Revise reg properties based on new cell-size. - Move the serial/uart aliases from the SoC .dtsi to board .dts files. - Correct the model string of RDB2. - Add comments for the uart markings on PCB. - Adjust RAM size comments of memory nodes. - Convert reg addresses of memory nodes into hex format. - MAINTAINERS - Add information of reviewers. Chester Lin (8): dt-bindings: arm: fsl: add NXP S32G2 boards dt-bindings: serial: fsl-linflexuart: convert to json-schema format dt-bindings: serial: fsl-linflexuart: add compatible for S32G2 arm64: dts: add NXP S32G2 support arm64: dts: s32g2: add serial/uart support arm64: dts: s32g2: add VNP-EVB and VNP-RDB2 support arm64: dts: s32g2: add memory nodes for evb and rdb2 MAINTAINERS: add an entry for NXP S32G boards .../devicetree/bindings/arm/fsl.yaml | 7 + .../bindings/serial/fsl,s32-linflexuart.txt | 22 ---- .../bindings/serial/fsl,s32-linflexuart.yaml | 48 +++++++ MAINTAINERS | 9 ++ arch/arm64/boot/dts/freescale/Makefile | 2 + arch/arm64/boot/dts/freescale/s32g2.dtsi | 124 ++++++++++++++++++ .../arm64/boot/dts/freescale/s32g274a-evb.dts | 34 +++++ .../boot/dts/freescale/s32g274a-rdb2.dts | 40 ++++++ 8 files changed, 264 insertions(+), 22 deletions(-) delete mode 100644 Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.txt create mode 100644 Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.yaml create mode 100644 arch/arm64/boot/dts/freescale/s32g2.dtsi create mode 100644 arch/arm64/boot/dts/freescale/s32g274a-evb.dts create mode 100644 arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts -- 2.30.0
