On Tue, Sep 07, 2021 at 09:57:22AM +0800, Cai Huoqing wrote: > The NXP i.MX 8QuadXPlus SOC has a new ADC IP, so add the binding > documentation for NXP IMX8QXP ADC. > > Signed-off-by: Cai Huoqing <caihuoqing@xxxxxxxxx> > --- > v1->v2: *Fix some indentation issues. > *Mark status as okay. > *Change clock2 source. > v1 link: > https://patchwork.kernel.org/project/linux-arm-kernel/patch/20210830172140.414-5-caihuoqing@xxxxxxxxx/ > > .../bindings/iio/adc/nxp,imx8qxp-adc.yaml | 85 +++++++++++++++++++ > 1 file changed, 85 insertions(+) > create mode 100644 Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml > > diff --git a/Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml b/Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml > new file mode 100644 > index 000000000000..77501898a563 > --- /dev/null > +++ b/Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml > @@ -0,0 +1,85 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/iio/adc/nxp,imx8qxp-adc.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: NXP IMX8QXP ADC bindings > + > +maintainers: > + - Cai Huoqing <caihuoqing@xxxxxxxxx> > + > +description: > + Supports the ADC found on the IMX8QXP SoC. > + > +properties: > + compatible: > + const: nxp,imx8qxp-adc > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + maxItems: 2 > + > + clock-names: > + items: > + - const: per > + - const: ipg > + > + assigned-clocks: > + maxItems: 1 > + > + assigned-clocks-rate: > + maxItems: 1 > + > + power-domains: > + maxItems: 1 > + > + status: > + const: disable ??? You don't need 'status' in bindings. Plus this would cause 'status = "okay"' to cause an error in your dts files. > + > + "#io-channel-cells": > + const: 1 > + > +required: > + - compatible > + - reg > + - interrupts > + - interrupts-parent It is valid for interrupt-parent to be in a parent node, so it is never required. > + - clocks > + - clock-names > + - assigned-clocks > + - assigned-clock-rates > + - power-domains > + - state Not documented. > + - "#address-cells" > + - "#size-cells" > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/firmware/imx/rsrc.h> > + soc { > + #address-cells = <1>; > + #size-cells = <1>; > + adc@5a880000 { > + compatible = "nxp,imx8qxp-adc"; > + reg = <0x0 0x5a880000 0x0 0x10000>; > + interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clk IMX_SC_R_ADC_0>, > + <&clk IMX_SC_R_ADC_0>; > + clock-names = "per", "ipg"; > + assigned-clocks = <&clk IMX_SC_R_ADC_0>; > + assigned-clock-rates = <24000000>; > + power-domains = <&pd IMX_SC_R_ADC_0>; > + status = "okay"; Remove status from examples. > + #io-channel-cells = <1>; > + }; > + }; > +... > -- > 2.25.1 > >
