RE: [PATCH 2/2] iommu/ipmmu-vmsa: Add support for r8a779a0

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Hi Geert-san,

> From: Geert Uytterhoeven, Sent: Tuesday, September 7, 2021 3:34 PM
> 
> Hi Shimoda-san,
> 
> On Tue, Sep 7, 2021 at 2:02 AM Yoshihiro Shimoda
> <yoshihiro.shimoda.uh@xxxxxxxxxxx> wrote:
> > > From: Geert Uytterhoeven, Sent: Tuesday, September 7, 2021 12:34 AM
> > > On Wed, Sep 1, 2021 at 12:27 PM Yoshihiro Shimoda
> > > <yoshihiro.shimoda.uh@xxxxxxxxxxx> wrote:
> > > > Add support for r8a779a0 (R-Car V3U). The IPMMU hardware design
> > > > of this SoC differs than others. So, add a new ipmmu_features for it.
> > > >
> > > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx>
> > >
> > > > --- a/drivers/iommu/ipmmu-vmsa.c
> > > > +++ b/drivers/iommu/ipmmu-vmsa.c
> > >
> > > > @@ -922,6 +922,20 @@ static const struct ipmmu_features ipmmu_features_rcar_gen3 = {
> > > >         .utlb_offset_base = 0,
> > > >  };
> > > >
> > > > +static const struct ipmmu_features ipmmu_features_r8a779a0 = {
> > > > +       .use_ns_alias_offset = false,
> > > > +       .has_cache_leaf_nodes = true,
> > > > +       .number_of_contexts = 8,
> > >
> > > Shouldn't this be 16?
> > > Or do you plan to add support for more than 8 contexts later, as that
> > > would require increasing IPMMU_CTX_MAX, and updating ipmmu_ctx_reg()
> > > to handle the second bank of 8 contexts?
> >
> > I would like to add support for more than 8 contexts later because
> > I realized that ctx_offset_{base,stride} are not suitable for the second bank
> > of 8 contexts...
> 
> Wouldn't something like below be sufficient?

Thank you for your suggestion!

>  static unsigned int ipmmu_ctx_reg(struct ipmmu_vmsa_device *mmu,
>                                   unsigned int context_id, unsigned int reg)
>  {
> -       return mmu->features->ctx_offset_base +
> -              context_id * mmu->features->ctx_offset_stride + reg;
> +       unsigned int base = mmu->features->ctx_offset_base;
> +
> +       if (context_id > 7)
> +               base += 0x800 - 8 * 0x1040;

This should be "base += 0x800 - 8 * 0x40;" because the 8th context address is
0x18800, not 0x10800.

I'll send v2 patch to support 16 contexts.
(I'll change IPMMU_CTX_MAX to 16 too.)

Best regards,
Yoshihiro Shimoda

> +
> +       return base + context_id * mmu->features->ctx_offset_stride + reg;
>  }
> 
> Gr{oetje,eeting}s,
> 
>                         Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds




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