This adds a binding documenting operating-points-v2-kryo-cpu in a qcom-cpu-opp.yaml file. Logic is to add any new Qualcomm SoCs CPU related OPP compatibles in here. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxxx> --- .../devicetree/bindings/opp/qcom-cpu-opp.yaml | 68 +++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 Documentation/devicetree/bindings/opp/qcom-cpu-opp.yaml diff --git a/Documentation/devicetree/bindings/opp/qcom-cpu-opp.yaml b/Documentation/devicetree/bindings/opp/qcom-cpu-opp.yaml new file mode 100644 index 000000000000..b4d83b64228c --- /dev/null +++ b/Documentation/devicetree/bindings/opp/qcom-cpu-opp.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/opp/qcom-cpu-opp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies, Inc. CPU OPP bindings + +maintainers: + - Ilia Lin <ilia.lin@xxxxxxxxxx> + +allOf: + - $ref: opp-v2-base.yaml# + +properties: + compatible: + const: operating-points-v2-kryo-cpu + + nvmem-cells: + description: | + A phandle pointing to a nvmem-cells node representing the efuse + registers that has information about the speedbin that is used + to select the right frequency/voltage value pair. + maxItems: 1 + + opp-shared: true + +required: + - compatible + +patternProperties: + '^opp-?[0-9]+$': + type: object + + properties: + clock-latency-ns: true + opp-hz: true + opp-microvolt: true + opp-supported-hw: true + required-opps: true + + required: + - opp-hz + + unevaluatedProperties: false + +additionalProperties: false + +examples: + - | + cpu_opp_table: opp-table-cpu { + compatible = "operating-points-v2-kryo-cpu"; + opp-shared; + + opp-1094400000 { + opp-hz = /bits/ 64 <1094400000>; + required-opps = <&cpr_opp1>; + }; + opp-1248000000 { + opp-hz = /bits/ 64 <1248000000>; + required-opps = <&cpr_opp2>; + }; + opp-1401600000 { + opp-hz = /bits/ 64 <1401600000>; + required-opps = <&cpr_opp3>; + }; + }; +... -- 2.32.0
