Re: [PATCH v3 2/4] dt-bindings: serial: uartlite: Add properties for synthesis-time parameters

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On Thu, 26 Aug 2021 15:21:52 -0400, Sean Anderson wrote:
> The uartlite device is a "soft" device. Many parameters, such as baud
> rate, data bits, and the presence of a parity bit are configured before
> synthesis and may not be changed (or discovered) at runtime. However, we
> must know what these settings are in order to properly calculate the
> uart timeout (and to inform the user about the actual baud of the uart).
> 
> These properties are present for out-of-tree bindings generated by
> Xilinx's tools. However, they are also (mostly) present in in-tree
> bindings. I chose current-speed over xlnx,baudrate primarily because it
> seemed to be used by more existing bindings. Although these properties
> are marked as "required", note that only current-speed is required by
> the driver itself. Hopefully, this will allow for an easier transition.
> 
> Signed-off-by: Sean Anderson <sean.anderson@xxxxxxxx>
> ---
> 
> Changes in v3:
> - Removed defaults for required properties
> 
>  .../bindings/serial/xlnx,opb-uartlite.yaml    | 37 +++++++++++++++++++
>  1 file changed, 37 insertions(+)
> 

Reviewed-by: Rob Herring <robh@xxxxxxxxxx>



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