Describe the PWM block on IPQ6018.
The PWM is in the TCSR area. Make &tcsr "simple-mfd" compatible, and add
&pwm as child of &tcsr.
Add also ipq6018 specific compatible string.
Signed-off-by: Baruch Siach <baruch@xxxxxxxxxx>
---
v8:
Add size cell to 'reg' (Rob)
v7:
Use 'reg' instead of 'offset' (Rob)
Add qcom,tcsr-ipq6018 (Rob)
Drop clock-names (Bjorn)
v6:
Make the PWM node child of TCSR (Rob Herring)
Add assigned-clocks/assigned-clock-rates (Uwe Kleine-König)
v5: Use qcom,pwm-regs for TCSR phandle instead of direct regs
v3: s/qcom,pwm-ipq6018/qcom,ipq6018-pwm/ (Rob Herring)
---
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index a31df7d154db..8e8f72d9c172 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -259,8 +259,20 @@ tcsr_mutex_regs: syscon@1905000 {
};
tcsr: syscon@1937000 {
- compatible = "syscon";
+ compatible = "qcom,tcsr-ipq6018", "syscon", "simple-mfd";
reg = <0x0 0x01937000 0x0 0x21000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ pwm: pwm@a010 {
+ compatible = "qcom,ipq6018-pwm";
+ reg = <0xa010 0x20>;
+ clocks = <&gcc GCC_ADSS_PWM_CLK>;
+ assigned-clocks = <&gcc GCC_ADSS_PWM_CLK>;
+ assigned-clock-rates = <100000000>;
+ #pwm-cells = <2>;
+ status = "disabled";
+ };
};
blsp_dma: dma-controller@7884000 {
--
2.33.0
