> Date: Fri, 27 Aug 2021 17:59:59 +0000 > From: Alyssa Rosenzweig <alyssa@xxxxxxxxxxxxx> > > > Clock references and DART (IOMMU) references are left out at the > > moment and will be added once the appropriate bindings have been > > settled upon. > > > > DART is in mainline .... is there a PCIe specific issue? True. I don't expect 4/4 to be merged as part of this series though as it will need to go through marcan's tree. It is mostly there to show what the device tree will look like.
