Quoting Rajesh Patil (2021-08-26 06:15:27)
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index f8dd5ff..da3cf19 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -434,6 +434,25 @@
> };
> };
>
> + qup_opp_table: qup-opp-table {
Surely this could be placed under /soc@0/geniqup@9c0000 alongside the
other devices and the node name could be opp-table?
> + compatible = "operating-points-v2";
> +
> + opp-75000000 {
> + opp-hz = /bits/ 64 <75000000>;
> + required-opps = <&rpmhpd_opp_low_svs>;
> + };
> +
> + opp-100000000 {
> + opp-hz = /bits/ 64 <100000000>;
> + required-opps = <&rpmhpd_opp_svs>;
> + };
> +
> + opp-128000000 {
> + opp-hz = /bits/ 64 <128000000>;
> + required-opps = <&rpmhpd_opp_nom>;
> + };
> + };
> +
> soc: soc@0 {
> #address-cells = <2>;
> #size-cells = <2>;
> @@ -536,24 +555,425 @@
> qupv3_id_0: geniqup@9c0000 {
> compatible = "qcom,geni-se-qup";
> reg = <0 0x009c0000 0 0x2000>;
> - clock-names = "m-ahb", "s-ahb";
> clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
> <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
> + clock-names = "m-ahb", "s-ahb";
> #address-cells = <2>;
> #size-cells = <2>;
> ranges;
> + iommus = <&apps_smmu 0x123 0x0>;
> status = "disabled";
>
[...]
> @@ -1575,11 +1995,311 @@
> function = "qspi_data";
> };
>
> + qup_i2c0_data_clk:qup-i2c0-data-clk {
Please unstick the colon from the node name.
qup_i2c0_data_clk: qup-i2c0-data-clk {
};
> + pins = "gpio0", "gpio1";
> + function = "qup00";
> + };
> +
> + qup_i2c1_data_clk:qup-i2c1-data-clk {
> + pins = "gpio4", "gpio5";
> + function = "qup01";
> + };
> +
> + qup_i2c2_data_clk:qup-i2c2-data-clk {
> + pins = "gpio8", "gpio9";
> + function = "qup02";
> + };
> +
> + qup_i2c3_data_clk:qup-i2c3-data-clk {
> + pins = "gpio12", "gpio13";
> + function = "qup03";
> + };
> +
> + qup_i2c4_data_clk:qup-i2c4-data-clk {
> + pins = "gpio16", "gpio17";
> + function = "qup04";
> + };
> +
> + qup_i2c5_data_clk:qup-i2c5-data-clk {
> + pins = "gpio20", "gpio21";
> + function = "qup05";
> + };
> +
> + qup_i2c6_data_clk:qup-i2c6-data-clk {
> + pins = "gpio24", "gpio25";
> + function = "qup06";
> + };
> +
> + qup_i2c7_data_clk:qup-i2c7-data-clk {
> + pins = "gpio28", "gpio29";
> + function = "qup07";
> + };
> +
For all of these.
