On Fri, Aug 20, 2021 at 7:20 PM Chun-Jie Chen <chun-jie.chen@xxxxxxxxxxxx> wrote: > > Add MT8195 peripheral clock controller which provides clock > gate control for ethernet/flashif/pcie/ssusb. > > Signed-off-by: Chun-Jie Chen <chun-jie.chen@xxxxxxxxxxxx> > --- > drivers/clk/mediatek/Makefile | 2 +- > drivers/clk/mediatek/clk-mt8195-peri_ao.c | 62 +++++++++++++++++++++++ > 2 files changed, 63 insertions(+), 1 deletion(-) > create mode 100644 drivers/clk/mediatek/clk-mt8195-peri_ao.c > > diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile > index a142342a0cea..d5ee396dcded 100644 > --- a/drivers/clk/mediatek/Makefile > +++ b/drivers/clk/mediatek/Makefile > @@ -80,6 +80,6 @@ obj-$(CONFIG_COMMON_CLK_MT8192_MSDC) += clk-mt8192-msdc.o > obj-$(CONFIG_COMMON_CLK_MT8192_SCP_ADSP) += clk-mt8192-scp_adsp.o > obj-$(CONFIG_COMMON_CLK_MT8192_VDECSYS) += clk-mt8192-vdec.o > obj-$(CONFIG_COMMON_CLK_MT8192_VENCSYS) += clk-mt8192-venc.o > -obj-$(CONFIG_COMMON_CLK_MT8195) += clk-mt8195-apmixedsys.o clk-mt8195-topckgen.o > +obj-$(CONFIG_COMMON_CLK_MT8195) += clk-mt8195-apmixedsys.o clk-mt8195-topckgen.o clk-mt8195-peri_ao.o This line is getting too long. Please wrap it to within 100 characters. Otherwise, Reviewed-by: Chen-Yu Tsai <wenst@xxxxxxxxxxxx>
