Hi Richard,
Am Donnerstag, dem 19.08.2021 um 15:14 +0800 schrieb Richard Zhu:
> - the ranges should be aligned to $ref: /schemas/pci/pci-bus.yaml#
I failed to parse this part of the commit message and expected to see
an actual change in the addresses of the ranges or something. I think
it would be better to phrase this something like: "group ranges
property by region" or something to make it clear that this is purely a
DTS representation change, with no functional change.
> - num-viewport is required, add it in imx6sx.dtsi.
> - only one propert is allowed in the compatible string, remove
> "snps,dw-pcie".
>
> Signed-off-by: Richard Zhu <hongxing.zhu@xxxxxxx>
Other than the nit above, this is:
Reviewed-by: Lucas Stach <l.stach@xxxxxxxxxxxxxx>
> ---
> arch/arm/boot/dts/imx6qdl.dtsi | 6 +++---
> arch/arm/boot/dts/imx6qp.dtsi | 2 +-
> arch/arm/boot/dts/imx6sx.dtsi | 7 ++++---
> arch/arm/boot/dts/imx7d.dtsi | 6 +++---
> 4 files changed, 11 insertions(+), 10 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
> index 82e01ce026ea..cb43c72806a1 100644
> --- a/arch/arm/boot/dts/imx6qdl.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl.dtsi
> @@ -264,7 +264,7 @@ L2: cache-controller@a02000 {
> };
>
> pcie: pcie@1ffc000 {
> - compatible = "fsl,imx6q-pcie", "snps,dw-pcie";
> + compatible = "fsl,imx6q-pcie";
> reg = <0x01ffc000 0x04000>,
> <0x01f00000 0x80000>;
> reg-names = "dbi", "config";
> @@ -272,8 +272,8 @@ pcie: pcie@1ffc000 {
> #size-cells = <2>;
> device_type = "pci";
> bus-range = <0x00 0xff>;
> - ranges = <0x81000000 0 0 0x01f80000 0 0x00010000 /* downstream I/O */
> - 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */
> + ranges = <0x81000000 0 0 0x01f80000 0 0x00010000>, /* downstream I/O */
> + <0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */
> num-lanes = <1>;
> num-viewport = <4>;
> interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
> diff --git a/arch/arm/boot/dts/imx6qp.dtsi b/arch/arm/boot/dts/imx6qp.dtsi
> index b310f13a53f2..050365513836 100644
> --- a/arch/arm/boot/dts/imx6qp.dtsi
> +++ b/arch/arm/boot/dts/imx6qp.dtsi
> @@ -110,5 +110,5 @@ &mmdc0 {
> };
>
> &pcie {
> - compatible = "fsl,imx6qp-pcie", "snps,dw-pcie";
> + compatible = "fsl,imx6qp-pcie";
> };
> diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
> index 8516730778df..0324f9e17389 100644
> --- a/arch/arm/boot/dts/imx6sx.dtsi
> +++ b/arch/arm/boot/dts/imx6sx.dtsi
> @@ -1395,16 +1395,17 @@ pwm8: pwm@22b0000 {
> };
>
> pcie: pcie@8ffc000 {
> - compatible = "fsl,imx6sx-pcie", "snps,dw-pcie";
> + compatible = "fsl,imx6sx-pcie";
> reg = <0x08ffc000 0x04000>, <0x08f00000 0x80000>;
> reg-names = "dbi", "config";
> #address-cells = <3>;
> #size-cells = <2>;
> device_type = "pci";
> bus-range = <0x00 0xff>;
> - ranges = <0x81000000 0 0 0x08f80000 0 0x00010000 /* downstream I/O */
> - 0x82000000 0 0x08000000 0x08000000 0 0x00f00000>; /* non-prefetchable memory */
> + ranges = <0x81000000 0 0 0x08f80000 0 0x00010000>, /* downstream I/O */
> + <0x82000000 0 0x08000000 0x08000000 0 0x00f00000>; /* non-prefetchable memory */
> num-lanes = <1>;
> + num-viewport = <4>;
> interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-names = "msi";
> #interrupt-cells = <1>;
> diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi
> index b0bcfa9094a3..0cb8c8df87ef 100644
> --- a/arch/arm/boot/dts/imx7d.dtsi
> +++ b/arch/arm/boot/dts/imx7d.dtsi
> @@ -164,7 +164,7 @@ fec2: ethernet@30bf0000 {
> };
>
> pcie: pcie@33800000 {
> - compatible = "fsl,imx7d-pcie", "snps,dw-pcie";
> + compatible = "fsl,imx7d-pcie";
> reg = <0x33800000 0x4000>,
> <0x4ff00000 0x80000>;
> reg-names = "dbi", "config";
> @@ -172,8 +172,8 @@ pcie: pcie@33800000 {
> #size-cells = <2>;
> device_type = "pci";
> bus-range = <0x00 0xff>;
> - ranges = <0x81000000 0 0 0x4ff80000 0 0x00010000 /* downstream I/O */
> - 0x82000000 0 0x40000000 0x40000000 0 0x0ff00000>; /* non-prefetchable memory */
> + ranges = <0x81000000 0 0 0x4ff80000 0 0x00010000>, /* downstream I/O */
> + <0x82000000 0 0x40000000 0x40000000 0 0x0ff00000>; /* non-prefetchable memory */
> num-lanes = <1>;
> num-viewport = <4>;
> interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
