Hi Linus,
On 2021-08-13 14:27, Linus Walleij wrote:
Hi Satya/David,
nice work on identifying this bug!
On Fri, Aug 13, 2021 at 6:56 AM satya priya <skakit@xxxxxxxxxxxxxx>
wrote:
From: David Collins <collinsd@xxxxxxxxxxxxxx>
pmic_gpio_child_to_parent_hwirq() and
gpiochip_populate_parent_fwspec_fourcell() translate a pinctrl-
spmi-gpio irqspec to an SPMI controller irqspec. When they do
this, they use a fixed SPMI slave ID of 0 and a fixed GPIO
peripheral offset of 0xC0 (corresponding to SPMI address 0xC000).
This translation results in an incorrect irqspec for secondary
PMICs that don't have a slave ID of 0 as well as for PMIC chips
which have GPIO peripherals located at a base address other than
0xC000.
Correct this issue by passing the slave ID of the pinctrl-spmi-
gpio device's parent in the SPMI controller irqspec and by
calculating the peripheral ID base from the device tree 'reg'
property of the pinctrl-spmi-gpio device.
Signed-off-by: David Collins <collinsd@xxxxxxxxxxxxxx>
Signed-off-by: satya priya <skakit@xxxxxxxxxxxxxx>
Is this a regression or is it fine if I just apply it for v5.15?
I was thinking v5.15 since it isn't yet used in device trees.
Without this fix, [2/2] Vol+ support is failing. If possible please
merge it on current branch.
Yours,
Linus Walleij
