This series introduces performance monitor driver to Last-level-cache
tag-and-data (LLC-TAD) PMU which is an intergral part of Marvell CN10K SoCs.
The configuration and functionality of the TAD PMU is covered in patch 1.
The device tree bindings are dealt in patch 2.
v3:
- rebased on kernel v5.14-rc5
- disable sampling events via PERF_PMU_CAP_NO_INTERRUPT (Will Deacon)
- convert tad pmu bindings to schema (Will Deacon)
- replace tighter semantics with *_relaxed() accesses (Will Deacon)
- use PMU_EVENT_ATTR_ID generic macro (Will Deacon)
- allow cleanup of allocations through devm_kcalloc() (Will Deacon)
v2:
- rebased on kernel v5.13-rc3
Bhaskara Budiredla (2):
drivers: perf: Add LLC-TAD perf counter support
dt-bindings: perf: Add YAML schemas for Marvell CN10K LLC-TAD PMU
bindings
.../bindings/perf/marvell-cn10k-tad.yaml | 45 ++
drivers/perf/Kconfig | 7 +
drivers/perf/Makefile | 1 +
drivers/perf/marvell_cn10k_tad_pmu.c | 429 ++++++++++++++++++
4 files changed, 482 insertions(+)
create mode 100644 Documentation/devicetree/bindings/perf/marvell-cn10k-tad.yaml
create mode 100644 drivers/perf/marvell_cn10k_tad_pmu.c
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2.17.1
