From: Peng Fan <peng.fan@xxxxxxx> i.MX8MM features four Cortex-A53 cores, update the compatible to use more accurate "arm,cortex-a53-pmu" Signed-off-by: Peng Fan <peng.fan@xxxxxxx> --- arch/arm64/boot/dts/freescale/imx8mm.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index 49c46bbf8d9c..e878eefd8f78 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -192,7 +192,7 @@ psci { }; pmu { - compatible = "arm,armv8-pmuv3"; + compatible = "arm,cortex-a53-pmu"; interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; interrupt-affinity = <&A53_0>, <&A53_1>, <&A53_2>, <&A53_3>; -- 2.30.0