On Wed, Jul 30, 2014 at 12:45:00AM -0700, Brian Norris wrote: > On Wed, Jul 30, 2014 at 02:44:13PM +0800, Huang Shijie wrote: > > On Tue, Jul 29, 2014 at 10:08:43PM -0700, Brian Norris wrote: > > > On Mon, Apr 28, 2014 at 11:53:40AM +0800, Huang Shijie wrote: > > > > This patch adds the DDR quad read support by the following: > > > Are DDR modes in the scope of drivers/spi/ at all, so that we could > > > someday wire it up through m25p80.c? Or is 'DDR' such a distortion of > > > the meaning of 'SPI' such that it will be restricted only to SPI NOR > > > dedicated controllers? > > IMHO, the DDR modes can _NOT_ be handled by the driver/spi/*. > I agree to some extent, but I wanted to confirm with the SPI guys that > DDR is truly unique to SPI NOR. (I know it doesn't currently support > it.) I don't know what DDR is in this context, sorry. I'm guessing you're right since it sounds like something to do with extra clocks and this is probably not something used by generic SPI devices at present (if it ends up being widely implemented by sufficiently generic controllers that might change but the trend seems to be to flash specific controllers).
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