On 05/08/2021 09:21, Krzysztof Kozlowski wrote:
> The GIC-400 CPU interfaces address range is defined as 0x2000-0x3FFF (by
> ARM).
>
I underestimated the issue - this is actually bug as there is a GICC_DIR
register at offset 0x1000. Therefore:
Fixes: b9024cbc937d ("arm64: dts: Add initial device tree support for exynos7")
> Reported-by: Sam Protsenko <semen.protsenko@xxxxxxxxxx>
> Reported-by: Marc Zyngier <maz@xxxxxxxxxx>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/exynos/exynos7.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi
> index 8b06397ba6e7..c73a597ca66e 100644
> --- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
> @@ -137,7 +137,7 @@ gic: interrupt-controller@11001000 {
> #address-cells = <0>;
> interrupt-controller;
> reg = <0x11001000 0x1000>,
> - <0x11002000 0x1000>,
> + <0x11002000 0x2000>,
> <0x11004000 0x2000>,
> <0x11006000 0x2000>;
> };
>
Best regards,
Krzysztof
