On existing SoCs, the watchdog has a single clock input: HOSC (OSC24M)
divided by 750. However, starting with R329, LOSC (OSC32k) is added as
an alternative clock source, with a bit to switch between them.
Since 24 MHz / 750 == 32 kHz, not 32.768 kHz, the hardware adjusts the
cycle counts to keep the timeouts independent of the clock source. This
keeps the programming interface backward-compatible.
R329 also adds two new registers, to allow software to immediately drive
the SoC reset signal.
Signed-off-by: Samuel Holland <samuel@xxxxxxxxxxxx>
---
Changes v1 to v2:
- Switch from enum to const
- Add descriptions to "clocks" items
.../watchdog/allwinner,sun4i-a10-wdt.yaml | 32 ++++++++++++++++++-
1 file changed, 31 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml b/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml
index 9aa3c313c49f..8fa5b0d32381 100644
--- a/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml
+++ b/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml
@@ -24,6 +24,7 @@ properties:
- allwinner,sun50i-a100-wdt
- allwinner,sun50i-h6-wdt
- allwinner,sun50i-h616-wdt
+ - allwinner,sun50i-r329-wdt
- const: allwinner,sun6i-a31-wdt
- items:
- const: allwinner,suniv-f1c100s-wdt
@@ -33,7 +34,18 @@ properties:
maxItems: 1
clocks:
- maxItems: 1
+ minItems: 1
+ maxItems: 2
+ items:
+ - description: High-frequency oscillator input, divided internally
+ - description: Low-frequency oscillator input, only found on some variants
+
+ clock-names:
+ minItems: 1
+ maxItems: 2
+ items:
+ - const: hosc
+ - const: losc
interrupts:
maxItems: 1
@@ -44,6 +56,24 @@ required:
- clocks
- interrupts
+if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - allwinner,sun50i-r329-wdt
+
+then:
+ properties:
+ clocks:
+ minItems: 2
+
+ clock-names:
+ minItems: 2
+
+ required:
+ - clock-names
+
unevaluatedProperties: false
examples:
--
2.31.1
