Quoting Sibi Sankar (2021-07-29 11:04:42) > Re-arranging the register regions to support per core L3 DCVS would lead > to bindings breakage when using an older dt with a newer kernel. So, > document the EPSS compatible for SM8250/SM8350 SoCs and use them in the > CPUFreq-hw driver to prevent such breakages. > > Signed-off-by: Sibi Sankar <sibis@xxxxxxxxxxxxxx> > --- Reviewed-by: Stephen Boyd <swboyd@xxxxxxxxxxxx>
