On Mon, Aug 02, 2021 at 03:15:50PM +0300, Vladimir Oltean wrote: > On Mon, Aug 02, 2021 at 04:15:08PM +0530, Prasanna Vengateshan wrote: > > On Sat, 2021-07-31 at 18:04 +0300, Vladimir Oltean wrote: > > > > +void lan937x_mac_config(struct ksz_device *dev, int port, > > > > + phy_interface_t interface) > > > > +{ > > > > + u8 data8; > > > > + > > > > + lan937x_pread8(dev, port, REG_PORT_XMII_CTRL_1, &data8); > > > > + > > > > + /* clear MII selection & set it based on interface later */ > > > > + data8 &= ~PORT_MII_SEL_M; > > > > + > > > > + /* configure MAC based on interface */ > > > > + switch (interface) { > > > > + case PHY_INTERFACE_MODE_MII: > > > > + lan937x_config_gbit(dev, false, &data8); > > > > + data8 |= PORT_MII_SEL; > > > > + break; > > > > + case PHY_INTERFACE_MODE_RMII: > > > > + lan937x_config_gbit(dev, false, &data8); > > > > + data8 |= PORT_RMII_SEL; > > > > + break; > > > > + case PHY_INTERFACE_MODE_RGMII: > > > > + case PHY_INTERFACE_MODE_RGMII_ID: > > > > + case PHY_INTERFACE_MODE_RGMII_TXID: > > > > + case PHY_INTERFACE_MODE_RGMII_RXID: > > > > + lan937x_config_gbit(dev, true, &data8); > > > > + data8 |= PORT_RGMII_SEL; > > > > + > > > > + /* Add RGMII internal delay for cpu port*/ > > > > + if (dsa_is_cpu_port(dev->ds, port)) { > > > > > > Why only for the CPU port? I would like Andrew/Florian to have a look > > > here, I guess the assumption is that if the port has a phy-handle, the > > > RGMII delays should be dealt with by the PHY, but the logic seems to be > > > "is a CPU port <=> has a phy-handle / isn't a CPU port <=> doesn't have > > > a phy-handle"? What if it's a fixed-link port connected to a downstream > > > switch, for which this one is a DSA master? > > > > Thanks for reviewing the patches. My earlier proposal here was to check if there > > is no phydev (dp->slave->phydev) or if PHY is genphy, then apply RGMII delays > > assuming delays should be dealt with the phy driver if available. What do you > > think of that? > > I don't know what to suggest, this is a bit of a minefield. In general, the MAC does nothing, and passes the value to the PHY. The PHY inserts delays as requested. To address Vladimir point, PHY_INTERFACE_MODE_RGMII_TXID would mean the PHY adds delay in the TX direction, and assumes the RX delay comes from somewhere else, probably the PCB. I only recommend the MAC adds delays when the PHY cannot, or there is no PHY, e.g. SoC to switch, or switch to switch link. There are a few MAC drivers that do add delays, mostly because that is how the vendor crap tree does it. So as i said, what you propose is O.K, it follows this general rule of thumb. Andrew