Re: [PATCH 2/2] USB: dwc2: Add OTG support for Ingenic SoCs.

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Hi Greg,

On 2021/7/27 下午10:27, Greg KH wrote:
On Sat, Jul 24, 2021 at 04:48:41PM +0800, 周琰杰 (Zhou Yanjie) wrote:
Add OTG support for the JZ4775 SoC, the JZ4780 SoC, the X1000
SoC, the X1600 SoC, the X1830 SoC, and the X2000 SoC. Introduce
support for disable Ingenic overcurrent detection, once selected
it enables GOTGCTL register bits VbvalidOvEn and VbvalidOvVal to
disable the VBUS overcurrent detection.

This patch is derived from Dragan Čečavac (in the kernel 3.18.3
tree of CI20). It is very useful for the MIPS Creator CI20 (r1).
Without this patch, OTG port of CI20 has a great probability to
face overcurrent warning, which breaks the OTG functionality.

Signed-off-by: Dragan Čečavac <dragancecavac@xxxxxxxxx>
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@xxxxxxxxxxxxxx>
---
  drivers/usb/dwc2/core.c   |  9 +++++++++
  drivers/usb/dwc2/core.h   |  5 +++++
  drivers/usb/dwc2/params.c | 49 ++++++++++++++++++++++++++++++++++++++++++++++-
  3 files changed, 62 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c
index 272ae57..c35b2e2 100644
--- a/drivers/usb/dwc2/core.c
+++ b/drivers/usb/dwc2/core.c
@@ -1153,6 +1153,7 @@ static void dwc2_set_turnaround_time(struct dwc2_hsotg *hsotg)
  int dwc2_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
  {
  	u32 usbcfg;
+	u32 otgctl;
  	int retval = 0;
if ((hsotg->params.speed == DWC2_SPEED_PARAM_FULL ||
@@ -1187,6 +1188,14 @@ int dwc2_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
  		dwc2_writel(hsotg, usbcfg, GUSBCFG);
  	}
+ if (hsotg->params.deactivate_ingenic_overcurrent_detection) {
+		if (dwc2_is_host_mode(hsotg)) {
+			otgctl = readl(hsotg->regs + GOTGCTL);
+			otgctl |= GOTGCTL_VBVALOEN | GOTGCTL_VBVALOVAL;
+			writel(otgctl, hsotg->regs + GOTGCTL);
+		}
+	}
+
  	return retval;
  }
diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index ab6b815..e026d13 100644
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -418,6 +418,10 @@ enum dwc2_ep0_state {
   *			detection using GGPIO register.
   *			0 - Deactivate the external level detection (default)
   *			1 - Activate the external level detection
+ * @deactivate_ingenic_overcurrent_detection: Deactivate Ingenic overcurrent
+ *			detection.
+ *			0 - Activate the overcurrent detection (default)
Having 0 as "active" is rough to handle over time.

All of the other options are "activate", so please, keep them the same
if at all possible.


Sure, I will try.


Thanks and best regards!



thanks,

greg k-h



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