On Mon, Jul 19, 2021 at 01:19:34PM +0100, Biju Das wrote:
> Document USB phy bindings for RZ/G2L SoC.
>
> RZ/G2L USB2.0 phy uses line ctrl register for OTG_ID pin changes. It uses
> a different OTG-BC interrupt bit for device recognition. Apart from this,
> the PHY reset is controlled by USBPHY control IP and Document reset is a
> required property.
>
> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> ---
> v3->v4:
> * Removed second reset
> * Added family specific compatible string.
> v2->v3
> * Created a new compatible for RZ/G2L as per Geert's suggestion.
> * Added resets required properties for RZ/G2L SoC.
> ---
> .../bindings/phy/renesas,usb2-phy.yaml | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml b/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml
> index d5dc5a3cdceb..151158d7a224 100644
> --- a/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml
> @@ -30,6 +30,11 @@ properties:
> - renesas,usb2-phy-r8a77995 # R-Car D3
> - const: renesas,rcar-gen3-usb2-phy
>
> + - items:
> + - enum:
> + - renesas,usb2-phy-r9a07g044 # RZ/G2{L,LC}
> + - const: renesas,rzg2l-usb2-phy # RZ/G2L family
> +
> reg:
> maxItems: 1
>
> @@ -91,6 +96,20 @@ required:
> - clocks
> - '#phy-cells'
>
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: renesas,rzg2l-usb2-phy
> + then:
> + properties:
> + resets:
> + description: |
> + USB/PHY reset associated with the port.
You don't need 'properties' part here. Just 'required'.
> + required:
> + - resets
> +
> additionalProperties: false
>
> examples:
> --
> 2.17.1
>
>
