This patchset adds the clock & reset driver support for i.MX8ULP. For some of the PCC slot, As there is a SWRST control bit share the same pcc register for peripheral reset ccontrol. To simplify the case, register the pcc reset controller driver when pcc clock driver is registered. Patch 1/9 for the dt-bindings part is send out for review previously with the dts patchset: https://patchwork.kernel.org/project/linux-arm-kernel/cover/20210607083921.2668568-1-ping.bai@xxxxxxx/ Shawn suggests to send out the clock driver part firstly, so this patch is included in this patchset for now. Anson Huang (1): clk: imx: disable i.mx7ulp composite clock during initialization Jacky Bai (8): dt-bindings: clock: Add imx8ulp clock support clk: imx: Update the pllv4 to support imx8ulp clk: imx: Update the compsite driver to support imx8ulp clk: imx: Add 'CLK_SET_RATE_NO_REPARENT' for composite-7ulp clk: imx: disable the pfd when set pfdv2 clock rate clk: imx: Update the pfdv2 for 8ulp specific support clk: imx: Add clock driver for imx8ulp clk: imx: Add the pcc reset controller support on imx8ulp .../bindings/clock/imx8ulp-clock.yaml | 128 ++++ drivers/clk/imx/Kconfig | 7 + drivers/clk/imx/Makefile | 2 + drivers/clk/imx/clk-composite-7ulp.c | 87 ++- drivers/clk/imx/clk-imx7ulp.c | 20 +- drivers/clk/imx/clk-imx8ulp.c | 574 ++++++++++++++++++ drivers/clk/imx/clk-pfdv2.c | 22 +- drivers/clk/imx/clk-pllv4.c | 34 +- drivers/clk/imx/clk.h | 24 +- include/dt-bindings/clock/imx8ulp-clock.h | 262 ++++++++ include/dt-bindings/reset/imx8ulp-pcc-reset.h | 59 ++ 11 files changed, 1187 insertions(+), 32 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/imx8ulp-clock.yaml create mode 100644 drivers/clk/imx/clk-imx8ulp.c create mode 100644 include/dt-bindings/clock/imx8ulp-clock.h create mode 100644 include/dt-bindings/reset/imx8ulp-pcc-reset.h -- 2.26.2
