Convert serial for Cadence UART bindings documentation to YAML.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@xxxxxxxxxxx>
---
v2:
- Fix enum of compatible
- Change from additionalProperties: false to unevaluatedProperties: false
- Update compatible string in examples.
.../devicetree/bindings/serial/cdns,uart.txt | 27 --------
.../devicetree/bindings/serial/cdns,uart.yaml | 66 +++++++++++++++++++
2 files changed, 66 insertions(+), 27 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/serial/cdns,uart.txt
create mode 100644 Documentation/devicetree/bindings/serial/cdns,uart.yaml
diff --git a/Documentation/devicetree/bindings/serial/cdns,uart.txt b/Documentation/devicetree/bindings/serial/cdns,uart.txt
deleted file mode 100644
index 4efc560f90abbd..00000000000000
--- a/Documentation/devicetree/bindings/serial/cdns,uart.txt
+++ /dev/null
@@ -1,27 +0,0 @@
-Binding for Cadence UART Controller
-
-Required properties:
-- compatible :
- Use "xlnx,xuartps","cdns,uart-r1p8" for Zynq-7xxx SoC.
- Use "xlnx,zynqmp-uart","cdns,uart-r1p12" for Zynq Ultrascale+ MPSoC.
-- reg: Should contain UART controller registers location and length.
-- interrupts: Should contain UART controller interrupts.
-- clocks: Must contain phandles to the UART clocks
- See ../clocks/clock-bindings.txt for details.
-- clock-names: Tuple to identify input clocks, must contain "uart_clk" and "pclk"
- See ../clocks/clock-bindings.txt for details.
-
-
-Optional properties:
-- cts-override : Override the CTS modem status signal. This signal will
- always be reported as active instead of being obtained from the modem status
- register. Define this if your serial port does not use this pin
-
-Example:
- uart@e0000000 {
- compatible = "cdns,uart-r1p8";
- clocks = <&clkc 23>, <&clkc 40>;
- clock-names = "uart_clk", "pclk";
- reg = <0xE0000000 0x1000>;
- interrupts = <0 27 4>;
- };
diff --git a/Documentation/devicetree/bindings/serial/cdns,uart.yaml b/Documentation/devicetree/bindings/serial/cdns,uart.yaml
new file mode 100644
index 00000000000000..fcdbe6f87e9808
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/cdns,uart.yaml
@@ -0,0 +1,66 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/serial/cdns,uart.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cadence UART Controller Device Tree Bindings
+
+maintainers:
+ - Michal Simek <michal.simek@xxxxxxxxxx>
+
+allOf:
+ - $ref: /schemas/serial.yaml#
+
+properties:
+ compatible:
+ oneOf:
+ - description: UART controller for Zynq-7xxx SoC
+ items:
+ - const: xlnx,xuartps
+ - const: cdns,uart-r1p8
+ - description: UART controller for Zynq Ultrascale+ MPSoC
+ items:
+ - const: xlnx,zynqmp-uart
+ - const: cdns,uart-r1p12
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 2
+
+ clock-names:
+ items:
+ - const: uart_clk
+ - const: pclk
+
+ cts-override:
+ description: |
+ Override the CTS modem status signal. This signal will
+ always be reported as active instead of being obtained
+ from the modem status register. Define this if your serial
+ port does not use this pin.
+ type: boolean
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ uart0: serial@e0000000 {
+ compatible = "xlnx,xuartps", "cdns,uart-r1p8";
+ clocks = <&clkc 23>, <&clkc 40>;
+ clock-names = "uart_clk", "pclk";
+ reg = <0xE0000000 0x1000>;
+ interrupts = <0 27 4>;
+ };
--
2.32.0
