On Fri 09 Jul 15:08 CDT 2021, quic_vamslank@xxxxxxxxxxx wrote:
> From: Vamsi krishna Lanka <quic_vamslank@xxxxxxxxxxx>
>
> This commit adds pincontrol node to SDX65 dts.
>
> Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@xxxxxxxxxxx>
> ---
> arch/arm/boot/dts/qcom-sdx65.dtsi | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
> index 4b5e7248c34d..155635d1de2f 100644
> --- a/arch/arm/boot/dts/qcom-sdx65.dtsi
> +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
> @@ -96,6 +96,17 @@ blsp1_uart3: serial@831000 {
> status = "disabled";
> };
>
> + tlmm: pinctrl@f100000 {
> + compatible = "qcom,sdx65-pinctrl";
> + reg = <0xf100000 0x300000>;
> + interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + interrupt-controller;
> + interrupt-parent = <&intc>;
> + #interrupt-cells = <2>;
You're missing gpio-ranges.
Please squash this with the other dts patch.
Thanks,
Bjorn
> + };
> +
> pdc: interrupt-controller@b210000 {
> compatible = "qcom,sdx65-pdc", "qcom,pdc";
> reg = <0xb210000 0x10000>;
> --
> 2.32.0
>
