From: Fugang Duan <fugang.duan@xxxxxxx>
Add property for RGMII delayed clock.
Signed-off-by: Fugang Duan <fugang.duan@xxxxxxx>
Signed-off-by: Joakim Zhang <qiangqing.zhang@xxxxxxx>
---
Documentation/devicetree/bindings/net/fsl-fec.txt | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/fsl-fec.txt b/Documentation/devicetree/bindings/net/fsl-fec.txt
index 6754be1b91c4..f93b9552cfc5 100644
--- a/Documentation/devicetree/bindings/net/fsl-fec.txt
+++ b/Documentation/devicetree/bindings/net/fsl-fec.txt
@@ -50,6 +50,10 @@ Optional properties:
SOC internal PLL.
- "enet_out"(option), output clock for external device, like supply clock
for PHY. The clock is required if PHY clock source from SOC.
+ - "enet_2x_txclk"(option), for RGMII sampleing clock which fixed at 250Mhz.
+ The clock is required if SOC RGMII enable clock delay.
+- fsl,rgmii_txc_dly: add RGMII TXC delayed clock from MAC.
+- fsl,rgmii_rxc_dly: add RGMII RXC delayed clock from MAC.
Optional subnodes:
- mdio : specifies the mdio bus in the FEC, used as a container for phy nodes
--
2.17.1
