On Mon, Jun 07, 2021 at 04:39:20PM +0800, Jacky Bai wrote: > Add the basic dtsi support for i.MX8ULP. > > i.MX 8ULP is part of the ULP family with emphasis on extreme > low-power techniques using the 28 nm fully depleted silicon on > insulator process. Like i.MX 7ULP, i.MX 8ULP continues to be > based on asymmetric architecture, however will add a third DSP > domain for advanced voice/audio capability and a Graphics domain > where it is possible to access graphics resources from the > application side or the realtime side. > > Signed-off-by: Jacky Bai <ping.bai@xxxxxxx> > --- > .../boot/dts/freescale/imx8ulp-pinfunc.h | 978 ++++++++++++++++++ > arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 474 +++++++++ > 2 files changed, 1452 insertions(+) > create mode 100755 arch/arm64/boot/dts/freescale/imx8ulp-pinfunc.h > create mode 100644 arch/arm64/boot/dts/freescale/imx8ulp.dtsi > > diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-pinfunc.h b/arch/arm64/boot/dts/freescale/imx8ulp-pinfunc.h > new file mode 100755 > index 000000000000..faa702634a38 > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx8ulp-pinfunc.h > @@ -0,0 +1,978 @@ > +/* SPDX-License-Identifier: GPL-2.0+ */ > diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi > new file mode 100644 > index 000000000000..469c2dcd4636 > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi > @@ -0,0 +1,474 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) How can I use MIT when GPL only header is included? Dual license the header please. And NXP is good with GPLv3, GPLv4, etc.? > +/* > + * Copyright 2021 NXP > + */ > + > +#include <dt-bindings/clock/imx8ulp-clock.h> > +#include <dt-bindings/gpio/gpio.h> > +#include <dt-bindings/interrupt-controller/arm-gic.h> > + > +#include "imx8ulp-pinfunc.h"
