Enable PCIe0 (Wi-Fi) and 2 (SDX55m) interfaces and PHYs and assign relevant pins and regulators. Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxx> --- .../boot/dts/qcom/sm8250-sony-xperia-edo.dtsi | 24 +++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo.dtsi b/arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo.dtsi index 52ed4b082bd7..0d7e3dbb12b1 100644 --- a/arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo.dtsi @@ -456,6 +456,30 @@ &i2c15 { /* Richwave RTC6226 FM Radio Receiver @ 64 */ }; +&pcie0 { + status = "okay"; +}; + +&pcie0_phy { + status = "okay"; + + vdda-phy-supply = <&vreg_l5a_0p88>; + vdda-pll-supply = <&vreg_l9a_1p2>; +}; + +&pcie2 { + status = "okay"; + + pinctrl-0 = <&pcie2_default_state &mdm2ap_default &ap2mdm_default>; +}; + +&pcie2_phy { + status = "okay"; + + vdda-phy-supply = <&vreg_l5a_0p88>; + vdda-pll-supply = <&vreg_l9a_1p2>; +}; + &pon_pwrkey { status = "okay"; }; -- 2.32.0