Hi Geert,
Thank you for the patch.
On Thu, Jun 10, 2021 at 11:37:21AM +0200, Geert Uytterhoeven wrote:
> Add support for the Renesas R-Car Starter Kit Premier equipped with an
> R-Car H3e-2G SiP.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
Reviewed-by: Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/renesas/Makefile | 1 +
> arch/arm64/boot/dts/renesas/r8a779m1-ulcb.dts | 54 +++++++++++++++++++
> 2 files changed, 55 insertions(+)
> create mode 100644 arch/arm64/boot/dts/renesas/r8a779m1-ulcb.dts
>
> diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
> index 5a689a1d10821f1d..2a9119c8651815eb 100644
> --- a/arch/arm64/boot/dts/renesas/Makefile
> +++ b/arch/arm64/boot/dts/renesas/Makefile
> @@ -64,3 +64,4 @@ dtb-$(CONFIG_ARCH_R8A77995) += r8a77995-draak.dtb
> dtb-$(CONFIG_ARCH_R8A779A0) += r8a779a0-falcon.dtb
>
> dtb-$(CONFIG_ARCH_R8A77951) += r8a779m1-salvator-xs.dtb
> +dtb-$(CONFIG_ARCH_R8A77951) += r8a779m1-ulcb.dtb
> diff --git a/arch/arm64/boot/dts/renesas/r8a779m1-ulcb.dts b/arch/arm64/boot/dts/renesas/r8a779m1-ulcb.dts
> new file mode 100644
> index 0000000000000000..e294b6bda28c68c8
> --- /dev/null
> +++ b/arch/arm64/boot/dts/renesas/r8a779m1-ulcb.dts
> @@ -0,0 +1,54 @@
> +// SPDX-License-Identifier: (GPL-2.0 or MIT)
> +/*
> + * Device Tree Source for the H3ULCB (R-Car Starter Kit Premier) with R-Car H3e-2G
> + *
> + * Copyright (C) 2021 Glider bv
> + *
> + * Based on r8a77951-ulcb.dts
> + *
> + * Copyright (C) 2016 Renesas Electronics Corp.
> + * Copyright (C) 2016 Cogent Embedded, Inc.
> + */
> +
> +/dts-v1/;
> +#include "r8a779m1.dtsi"
> +#include "ulcb.dtsi"
> +
> +/ {
> + model = "Renesas H3ULCB board based on r8a779m1";
> + compatible = "renesas,h3ulcb", "renesas,r8a779m1", "renesas,r8a7795";
> +
> + memory@48000000 {
> + device_type = "memory";
> + /* first 128MB is reserved for secure area. */
> + reg = <0x0 0x48000000 0x0 0x38000000>;
> + };
> +
> + memory@500000000 {
> + device_type = "memory";
> + reg = <0x5 0x00000000 0x0 0x40000000>;
> + };
> +
> + memory@600000000 {
> + device_type = "memory";
> + reg = <0x6 0x00000000 0x0 0x40000000>;
> + };
> +
> + memory@700000000 {
> + device_type = "memory";
> + reg = <0x7 0x00000000 0x0 0x40000000>;
> + };
> +};
> +
> +&du {
> + clocks = <&cpg CPG_MOD 724>,
> + <&cpg CPG_MOD 723>,
> + <&cpg CPG_MOD 722>,
> + <&cpg CPG_MOD 721>,
> + <&versaclock5 1>,
> + <&versaclock5 3>,
> + <&versaclock5 4>,
> + <&versaclock5 2>;
> + clock-names = "du.0", "du.1", "du.2", "du.3",
> + "dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3";
> +};
> --
> 2.25.1
>
--
Regards,
Laurent Pinchart
